drivers/pci/controller/dwc/pcie-designware.c | 28 +++++++++++++++++++ drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++++++ drivers/pci/pci.h | 6 +++++ drivers/pci/pcie/aspm.c | 40 ++++++++++++++++++++++++++++ 5 files changed, 89 insertions(+)
The T_POWER_ON indicates the time (in μs) that a Port requires the port
on the opposite side of Link to wait in L1.2.Exit after sampling CLKREQ#
asserted before actively driving the interface. This value is used by
the ASPM driver to compute the LTR_L1.2_THRESHOLD.
Currently, qcom root port exposes T_POWER_ON value of zero in the L1SS
capability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations,
which can result in improper L1.2 exit behavior and can trigger AER's.
In this series, qcom controller drivers read the devicetree property
"t-power-on" which got merged recently[1], and use that value to over
write default/wrong value.
To convert T_POWER_ON in to T_POWER_ON_SCALE & T_POWER_ON_VALUE created
a pcie_encode_t_power_on() helper in aspm.c and also created
dw_pcie_program_t_power_on() helper for other drivers to use these
helpers.
Link [1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
Changes in v5:
- Initialize *scale & *value to zero incase of ASPM is disabled pointed
by sashiko.
- Use dwc readl & writel API's instead of direct readl & writel pointed
by sashiko
- couple of nits (Mani).
- Link to v4: https://lore.kernel.org/r/20260404-t_power_on_fux-v4-0-2891391177f4@oss.qualcomm.com
Changes in v4:
- calculate maxv from PCI_L1SS_CTL2_T_PWR_ON_VALUE to PCI_L1SS_CAP_P_PWR_ON_VALUE (Mani).
- added a todo to move the reading the devicetree from qcom driver to
dwc once multi root port parsing support is added (Mani).
- Link to v3: https://lore.kernel.org/r/20260311-t_power_on_fux-v3-0-9b1f1d09c6f3@oss.qualcomm.com
Changes in v3:
- move pcie_encode_t_power_on() include/linux/pci.h to
drivers/pci/pci.h (Bjorn).
- couple of changes in commit text and variable name like t_power_on (Bjorn).
- remove return 0 from qcom_pcie_configure_ports (Bjorn).
- used FIELD_MODIFY instead of FIELD_PREP (Bjorn).
- Link to v2: https://lore.kernel.org/r/20260223-t_power_on_fux-v2-0-20c921262709@oss.qualcomm.com
Changes in v2:
- Instead of hard coding the values in the driver, created a devicetree
property "t-power-on" to program it (Bjorn & Mani).
- Link to v1: https://lore.kernel.org/r/20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com
To: Bjorn Helgaas <bhelgaas@google.com>
To: Jingoo Han <jingoohan1@gmail.com>
To: Manivannan Sadhasivam <mani@kernel.org>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Krzysztof Wilczyński <kwilczynski@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: linux-pci@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
---
Krishna Chaitanya Chundru (3):
PCI/ASPM: Add helper to encode L1SS T_POWER_ON fields
PCI: dwc: Add helper to Program T_POWER_ON
PCI: qcom: Program T_POWER_ON
drivers/pci/controller/dwc/pcie-designware.c | 28 +++++++++++++++++++
drivers/pci/controller/dwc/pcie-designware.h | 1 +
drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++++++
drivers/pci/pci.h | 6 +++++
drivers/pci/pcie/aspm.c | 40 ++++++++++++++++++++++++++++
5 files changed, 89 insertions(+)
---
base-commit: 3b3bea6d4b9c162f9e555905d96b8c1da67ecd5b
change-id: 20251104-t_power_on_fux-70dc68377941
Best regards,
--
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
On Tue, 28 Apr 2026 14:07:14 +0530, Krishna Chaitanya Chundru wrote:
> The T_POWER_ON indicates the time (in μs) that a Port requires the port
> on the opposite side of Link to wait in L1.2.Exit after sampling CLKREQ#
> asserted before actively driving the interface. This value is used by
> the ASPM driver to compute the LTR_L1.2_THRESHOLD.
>
> Currently, qcom root port exposes T_POWER_ON value of zero in the L1SS
> capability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations,
> which can result in improper L1.2 exit behavior and can trigger AER's.
>
> [...]
Applied, thanks!
[1/3] PCI/ASPM: Add helper to encode L1SS T_POWER_ON fields
commit: ea803322d3a8ec4ba60699a21b4ddc8fdbc0a242
[2/3] PCI: dwc: Add helper to Program T_POWER_ON
commit: a66a25538564850a977ee3cfc795aa05ac4f1700
[3/3] PCI: qcom: Program T_POWER_ON
commit: fca5f83fa339b357311ed250ec8041bbae11f66d
Best regards,
--
Manivannan Sadhasivam <mani@kernel.org>
On Tue, Apr 28, 2026 at 02:07:14PM +0530, Krishna Chaitanya Chundru wrote: > The T_POWER_ON indicates the time (in μs) that a Port requires the port > on the opposite side of Link to wait in L1.2.Exit after sampling CLKREQ# > asserted before actively driving the interface. This value is used by > the ASPM driver to compute the LTR_L1.2_THRESHOLD. > > Currently, qcom root port exposes T_POWER_ON value of zero in the L1SS > capability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations, > which can result in improper L1.2 exit behavior and can trigger AER's. > > In this series, qcom controller drivers read the devicetree property > "t-power-on" which got merged recently[1], and use that value to over > write default/wrong value. > > To convert T_POWER_ON in to T_POWER_ON_SCALE & T_POWER_ON_VALUE created > a pcie_encode_t_power_on() helper in aspm.c and also created > dw_pcie_program_t_power_on() helper for other drivers to use these > helpers. > > Link [1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/ > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Series LGTM! @Bjorn: Could you please ack patch 1 if you are OK with it? - Mani > --- > Changes in v5: > - Initialize *scale & *value to zero incase of ASPM is disabled pointed > by sashiko. > - Use dwc readl & writel API's instead of direct readl & writel pointed > by sashiko > - couple of nits (Mani). > - Link to v4: https://lore.kernel.org/r/20260404-t_power_on_fux-v4-0-2891391177f4@oss.qualcomm.com > > Changes in v4: > - calculate maxv from PCI_L1SS_CTL2_T_PWR_ON_VALUE to PCI_L1SS_CAP_P_PWR_ON_VALUE (Mani). > - added a todo to move the reading the devicetree from qcom driver to > dwc once multi root port parsing support is added (Mani). > - Link to v3: https://lore.kernel.org/r/20260311-t_power_on_fux-v3-0-9b1f1d09c6f3@oss.qualcomm.com > > Changes in v3: > - move pcie_encode_t_power_on() include/linux/pci.h to > drivers/pci/pci.h (Bjorn). > - couple of changes in commit text and variable name like t_power_on (Bjorn). > - remove return 0 from qcom_pcie_configure_ports (Bjorn). > - used FIELD_MODIFY instead of FIELD_PREP (Bjorn). > - Link to v2: https://lore.kernel.org/r/20260223-t_power_on_fux-v2-0-20c921262709@oss.qualcomm.com > > Changes in v2: > - Instead of hard coding the values in the driver, created a devicetree > property "t-power-on" to program it (Bjorn & Mani). > - Link to v1: https://lore.kernel.org/r/20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com > > To: Bjorn Helgaas <bhelgaas@google.com> > To: Jingoo Han <jingoohan1@gmail.com> > To: Manivannan Sadhasivam <mani@kernel.org> > To: Lorenzo Pieralisi <lpieralisi@kernel.org> > To: Krzysztof Wilczyński <kwilczynski@kernel.org> > To: Rob Herring <robh@kernel.org> > Cc: linux-pci@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-arm-msm@vger.kernel.org > > --- > Krishna Chaitanya Chundru (3): > PCI/ASPM: Add helper to encode L1SS T_POWER_ON fields > PCI: dwc: Add helper to Program T_POWER_ON > PCI: qcom: Program T_POWER_ON > > drivers/pci/controller/dwc/pcie-designware.c | 28 +++++++++++++++++++ > drivers/pci/controller/dwc/pcie-designware.h | 1 + > drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++++++ > drivers/pci/pci.h | 6 +++++ > drivers/pci/pcie/aspm.c | 40 ++++++++++++++++++++++++++++ > 5 files changed, 89 insertions(+) > --- > base-commit: 3b3bea6d4b9c162f9e555905d96b8c1da67ecd5b > change-id: 20251104-t_power_on_fux-70dc68377941 > > Best regards, > -- > Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > -- மணிவண்ணன் சதாசிவம்
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