The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
per2, per2pok, per3, adc0, adc1, emmc, and vga.

In the current series, we will only add the following pinctrl:
 - sys0, sys0h, sys1, sys2
 - per0, per1, per2, per2pok, per3

The remaining pinctrl will be implemented in future series.

This series depends on the series:
https://lore.kernel.org/all/20260402105523.447523-1-changhuang.liang@starfivetech.com/

Changhuang Liang (19):
  dt-bindings: pinctrl: Add starfive,jhb100-sys0-pinctrl
  pinctrl: starfive: Add StarFive JHB100 sys0 controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-sys0h-pinctrl
  pinctrl: starfive: Add StarFive JHB100 sys0h controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-sys1-pinctrl
  pinctrl: starfive: Add StarFive JHB100 sys1 controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-sys2-pinctrl
  pinctrl: starfive: Add StarFive JHB100 sys2 controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-per0-pinctrl
  pinctrl: starfive: Add StarFive JHB100 per0 controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-per1-pinctrl
  pinctrl: starfive: Add StarFive JHB100 per1 controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-per2-pinctrl
  pinctrl: starfive: Add StarFive JHB100 per2 controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-per2pok-pinctrl
  pinctrl: starfive: Add StarFive JHB100 per2pok controller driver
  dt-bindings: pinctrl: Add starfive,jhb100-per3-pinctrl
  pinctrl: starfive: Add StarFive JHB100 per3 controller driver
  riscv: dts: starfive: jhb100: Add pinctrl nodes

Lianfeng Ouyang (1):
  riscv: dts: starfive: Add StarFive JHB100 pin function definitions

 .../pinctrl/starfive,jhb100-per0-pinctrl.yaml |  219 ++
 .../pinctrl/starfive,jhb100-per1-pinctrl.yaml |  217 ++
 .../pinctrl/starfive,jhb100-per2-pinctrl.yaml |  178 ++
 .../starfive,jhb100-per2pok-pinctrl.yaml      |  154 ++
 .../pinctrl/starfive,jhb100-per3-pinctrl.yaml |  177 ++
 .../pinctrl/starfive,jhb100-sys0-pinctrl.yaml |  155 ++
 .../starfive,jhb100-sys0h-pinctrl.yaml        |  156 ++
 .../pinctrl/starfive,jhb100-sys1-pinctrl.yaml |  155 ++
 .../pinctrl/starfive,jhb100-sys2-pinctrl.yaml |  178 ++
 MAINTAINERS                                   |    8 +
 .../boot/dts/starfive/jhb100-evb1-eth.dts     |   27 +
 arch/riscv/boot/dts/starfive/jhb100-evb1.dtsi |    4 +
 .../boot/dts/starfive/jhb100-pinctrl.dtsi     |   19 +
 arch/riscv/boot/dts/starfive/jhb100-pinfunc.h |  642 ++++++
 arch/riscv/boot/dts/starfive/jhb100.dtsi      |  107 +
 drivers/pinctrl/starfive/Kconfig              |  117 ++
 drivers/pinctrl/starfive/Makefile             |   11 +
 .../starfive/pinctrl-starfive-jhb100-per0.c   |  100 +
 .../starfive/pinctrl-starfive-jhb100-per1.c   |  112 +
 .../starfive/pinctrl-starfive-jhb100-per2.c   |  102 +
 .../pinctrl-starfive-jhb100-per2pok.c         |   80 +
 .../starfive/pinctrl-starfive-jhb100-per3.c   |  101 +
 .../starfive/pinctrl-starfive-jhb100-sys0.c   |  111 +
 .../starfive/pinctrl-starfive-jhb100-sys0h.c  |   81 +
 .../starfive/pinctrl-starfive-jhb100-sys1.c   |   80 +
 .../starfive/pinctrl-starfive-jhb100-sys2.c   |  109 +
 .../starfive/pinctrl-starfive-jhb100.c        | 1821 +++++++++++++++++
 .../starfive/pinctrl-starfive-jhb100.h        |  191 ++
 28 files changed, 5412 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per0-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per1-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per2-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per2pok-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-per3-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-sys0-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-sys0h-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-sys1-pinctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jhb100-sys2-pinctrl.yaml
 create mode 100644 arch/riscv/boot/dts/starfive/jhb100-pinctrl.dtsi
 create mode 100644 arch/riscv/boot/dts/starfive/jhb100-pinfunc.h
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per0.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per1.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per2.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per2pok.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per3.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys0.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys0h.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys1.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys2.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100.c
 create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100.h

--
2.25.1

Hi Changhuang,

thanks for your patch!

On Fri, Apr 24, 2026 at 1:13 PM Changhuang Liang
<changhuang.liang@starfivetech.com> wrote:

> The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
> per2, per2pok, per3, adc0, adc1, emmc, and vga.
>
> In the current series, we will only add the following pinctrl:
>  - sys0, sys0h, sys1, sys2
>  - per0, per1, per2, per2pok, per3
>
> The remaining pinctrl will be implemented in future series.
>
> This series depends on the series:
> https://lore.kernel.org/all/20260402105523.447523-1-changhuang.liang@starfivetech.com/

(...)

>  .../starfive/pinctrl-starfive-jhb100.c        | 1821 +++++++++++++++++

Thats a big patch.

I need a motivation why the existing code in pinctrl-starfive-jh7110.c
and pinctrl-starfive-jh7100.c cannot be refactored, repurposed and
re-used of this hardware is related to the old hardware?

We don't want several copies of essentially the same driver, that
way we get maintenance overload.

So the first question about this patch set is if a completely new
driver is really needed.

A second question regards "banks" in the GPIO controller.
The callbacks offsets are exensively /32 %32 MOD:ed to clamp
to 32bit words. Should this rather be reflected in the device
tree model as a 3-cell GPIO <&gpio bank num flags> rather
than 2-cell <&gpio num flags>? Doing this makes it possible
to use gpiolib helpers.

Yours,
Linus Walleij