[PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615

Navya Malempati posted 1 patch 1 month, 3 weeks ago
drivers/pinctrl/qcom/pinctrl-qcs615.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
[PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
Posted by Navya Malempati 1 month, 3 weeks ago
From: Maulik Shah <maulik.shah@oss.qualcomm.com>

PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not
support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
pin to support non-ibi wakeup. Update the wakeirq map to reflect same.

Fixes: b698f36a9d40 ("pinctrl: qcom: add the tlmm driver for QCS615 platform")
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Navya Malempati <navya.malempati@oss.qualcomm.com>
---
 drivers/pinctrl/qcom/pinctrl-qcs615.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-qcs615.c b/drivers/pinctrl/qcom/pinctrl-qcs615.c
index 0ed4332d989e..f066b3a576f7 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs615.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs615.c
@@ -1040,11 +1040,11 @@ static const struct msm_pingroup qcs615_groups[] = {
 static const struct msm_gpio_wakeirq_map qcs615_pdc_map[] = {
 	{ 1, 45 },    { 3, 31 },    { 7, 55 },    { 9, 110 },   { 11, 34 },
 	{ 13, 33 },   { 14, 35 },   { 17, 46 },   { 19, 48 },   { 21, 83 },
-	{ 22, 36 },   { 26, 38 },   { 35, 37 },   { 39, 125 },  { 41, 47 },
-	{ 47, 49 },   { 48, 51 },   { 50, 52 },   { 51, 123 },  { 55, 56 },
+	{ 22, 36 },   { 26, 38 },   { 35, 37 },   { 39, 118 },  { 41, 47 },
+	{ 47, 49 },   { 48, 51 },   { 50, 52 },   { 51, 116 },  { 55, 56 },
 	{ 56, 57 },   { 57, 58 },   { 60, 60 },   { 71, 54 },   { 80, 73 },
 	{ 81, 64 },   { 82, 50 },   { 83, 65 },   { 84, 92 },   { 85, 99 },
-	{ 86, 67 },   { 87, 84 },   { 88, 124 },  { 89, 122 },  { 90, 69 },
+	{ 86, 67 },   { 87, 84 },   { 88, 117 },  { 89, 115 },  { 90, 69 },
 	{ 92, 88 },   { 93, 75 },   { 94, 91 },   { 95, 72 },   { 96, 82 },
 	{ 97, 74 },   { 98, 95 },   { 99, 94 },   { 100, 100 }, { 101, 40 },
 	{ 102, 93 },  { 103, 77 },  { 104, 78 },  { 105, 96 },  { 107, 97 },

---
base-commit: 70c8a7ec6715b5fb14e501731b5b9210a16684f7
change-id: 20260423-qcs615_gpio-37375b3fd718

Best regards,
--  
Navya Malempati <navya.malempati@oss.qualcomm.com>
Re: [PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
Posted by Linus Walleij 1 month, 2 weeks ago
On Thu, Apr 23, 2026 at 1:25 PM Navya Malempati
<navya.malempati@oss.qualcomm.com> wrote:

> From: Maulik Shah <maulik.shah@oss.qualcomm.com>
>
> PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not
> support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
> pin to support non-ibi wakeup. Update the wakeirq map to reflect same.
>
> Fixes: b698f36a9d40 ("pinctrl: qcom: add the tlmm driver for QCS615 platform")
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> Signed-off-by: Navya Malempati <navya.malempati@oss.qualcomm.com>

Patch applied for fixes.

I think it's the right thing? It's a bit confusing with different Qualcomm
employees not being fully aligned, but it's manageable for now.

Yours,
Linus Walleij
Re: [PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
Posted by Konrad Dybcio 1 month, 3 weeks ago
On 4/23/26 1:25 PM, Navya Malempati wrote:
> From: Maulik Shah <maulik.shah@oss.qualcomm.com>
> 
> PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not
> support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
> pin to support non-ibi wakeup. Update the wakeirq map to reflect same.
> 
> Fixes: b698f36a9d40 ("pinctrl: qcom: add the tlmm driver for QCS615 platform")
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> Signed-off-by: Navya Malempati <navya.malempati@oss.qualcomm.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad
Re: [PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
Posted by Dmitry Baryshkov 1 month, 3 weeks ago
On Thu, Apr 23, 2026 at 04:55:24PM +0530, Navya Malempati wrote:
> From: Maulik Shah <maulik.shah@oss.qualcomm.com>
> 
> PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not

Is this something which changed between SM6150 and QCS615?

> support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
> pin to support non-ibi wakeup. Update the wakeirq map to reflect same.

Should there be two commits instead of one?

> Fixes: b698f36a9d40 ("pinctrl: qcom: add the tlmm driver for QCS615 platform")
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> Signed-off-by: Navya Malempati <navya.malempati@oss.qualcomm.com>

-- 
With best wishes
Dmitry
Re: [PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
Posted by Navya Malempati 1 month, 3 weeks ago

On 4/23/2026 5:00 PM, Dmitry Baryshkov wrote:
> On Thu, Apr 23, 2026 at 04:55:24PM +0530, Navya Malempati wrote:
>> From: Maulik Shah <maulik.shah@oss.qualcomm.com>
>>
>> PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not
> 
> Is this something which changed between SM6150 and QCS615?

No.

> 
>> support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
>> pin to support non-ibi wakeup. Update the wakeirq map to reflect same.
> 
> Should there be two commits instead of one?
> 

Removed the ibi_i3c PDC mapping and updated the PDC pin mapping as part 
of the same commit.

Thanks,
Navya
Re: [PATCH] pinctrl: qcom: Fix GPIO to PDC wake irq map for qcs615
Posted by Konrad Dybcio 1 month, 3 weeks ago
On 4/23/26 1:30 PM, Dmitry Baryshkov wrote:
> On Thu, Apr 23, 2026 at 04:55:24PM +0530, Navya Malempati wrote:
>> From: Maulik Shah <maulik.shah@oss.qualcomm.com>
>>
>> PDC interrupts 122-125 were meant for ibi_i3c wakeup but qcs615 do not
> 
> Is this something which changed between SM6150 and QCS615?
> 
>> support i3c. GPIOs 39,51,88 and 89 are also connected to different PDC
>> pin to support non-ibi wakeup. Update the wakeirq map to reflect same.
> 
> Should there be two commits instead of one?

My reading of that commit message is "these PDC interrupts, to which
the later-mentioned GPIOs were assigned, were originally intended to
be used for I3C IBI wakeups, but these GPIOs also have an alternate
function, available through a different PDC port"

i.e. 4 pins, same issue

Konrad