This series adds support for managing SM8750 DISPCC MDP clocks through
CESTA (Client-side State Aggregation). CESTA provides resource management
(e.g clocks) for local subsystem resources.

Without CESTA, the clock driver directly programs the clock tree (PLLs,
RCGs, CBCs). With CESTA, the clock driver instead sends a performance
level request to the CESTA Resource Manager (CRM) driver. The CESTA
hardware then aggregates requests and scales clocks to the required
frequencies.

Without CESTA (direct clock programming)
----------------------------------------

+------------------+
|   Clock driver   |
+------------------+
          |
          |  programs PLLs / RCGs / CBCs directly
          v
+------------------+      +------------------+      +------------------+
|       PLLs       | ---> |       RCGs       | ---> |       CBCs       |
+------------------+      +------------------+      +------------------+

With CESTA (clock driver invokes CRM API's)
------------------------------------

+------------------+
|   Clock driver   |
+------------------+
          |
          |   sends perf_level request
          v
+------------------+
|    CRM driver    |
+------------------+
          |
          |   sends received request to CESTA HW 
          |  (CESTA HW programs PLLs / RCGs / CBCs)
          v
+------------------+      +------------------+      +------------------+
|       PLLs       | ---> |       RCGs       | ---> |       CBCs       |
+------------------+      +------------------+      +------------------+

This series includes:
1) Base support for the CRM drivers
2) Clock drivers support to communicate with CRM and control clocks via
CESTA
3) SM8750 DISPCC changes to control the DISPCC MDP clock and display PLL0
using CESTA

Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
---
Jagadeesh Kona (9):
      dt-bindings: clock: qcom,sm8550-dispcc: Add display CESTA support on SM8750
      dt-bindings: mfd: syscon: Add qcom,crmc-syscon compatible
      clk: qcom: common: Add helpers to control clocks using CRM
      clk: qcom: clk-alpha-pll: Add support for CRM based PLL ops
      clk: qcom: clk-alpha-pll: Add support to skip PLL configuration
      clk: qcom: clk-rcg2: Add support for CRM based RCG ops
      clk: qcom: common: Add support to register and control clocks using CRM
      clk: qcom: dispcc-sm8750: Add support to control MDP clocks using CESTA
      arm64: dts: qcom: sm8750: Add disp_crmc node and CRM properties to dispcc

Maulik Shah (4):
      dt-bindings: soc: Introduce device bindings for CESTA Resource Manager
      soc: qcom: Introduce CESTA resource manager driver
      arm64: dts: qcom: sm8750: Add Display CRM device
      arm64: defconfig: Enable Qualcomm CESTA Resource Manager

 .../bindings/clock/qcom,sm8550-dispcc.yaml         |  48 +
 Documentation/devicetree/bindings/mfd/syscon.yaml  |   2 +
 .../devicetree/bindings/soc/qcom/qcom,crm.yaml     |  83 ++
 arch/arm64/boot/dts/qcom/sm8750.dtsi               |  23 +
 arch/arm64/configs/defconfig                       |   1 +
 drivers/clk/qcom/clk-alpha-pll.c                   |  15 +-
 drivers/clk/qcom/clk-alpha-pll.h                   |   3 +
 drivers/clk/qcom/clk-rcg.h                         |  23 +-
 drivers/clk/qcom/clk-rcg2.c                        | 242 +++++
 drivers/clk/qcom/common.c                          |  93 ++
 drivers/clk/qcom/common.h                          |  57 +-
 drivers/clk/qcom/dispcc-sm8750.c                   |  89 +-
 drivers/soc/qcom/Kconfig                           |  10 +
 drivers/soc/qcom/Makefile                          |   2 +
 drivers/soc/qcom/crm.c                             | 996 +++++++++++++++++++++
 drivers/soc/qcom/trace-crm.h                       | 111 +++
 include/soc/qcom/crm.h                             |  72 ++
 17 files changed, 1834 insertions(+), 36 deletions(-)
---
base-commit: c7275b05bc428c7373d97aa2da02d3a7fa6b9f66
change-id: 20260419-cesta-sm870-dispcc-5e4fab72b53e

Best regards,
-- 
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>