.../devicetree/bindings/pci/intel-gw-pcie.yaml | 9 ++- MAINTAINERS | 3 +- drivers/pci/controller/dwc/pcie-intel-gw.c | 73 +++++++++++++++------- 3 files changed, 58 insertions(+), 27 deletions(-)
This series fixes and improve the 'intel-gw' driver to work again with
the current dwc pcie framework. The following changes are:
* Move interrupt 'enable' to its own function to improve readability,
and add additional register writes just as the Maxlinear kernel does in
their SDK.
* Enable clock for the PHY before PHY init call.
* Add missing 'start_link' callback. That was added to the PCIe dwc
framework.
* Move ATU base address assignment to the probe function and also add the
the possibility to read it from the devicetree by dwc core.
* Update devicetree documentation for intel-gw-pcie.yaml
* Remove unused preprocessor define.
* Mark driver as orphaned as the maitainer's email no longer works
Signed-off-by: Florian Eckert <fe@dev.tdt.de>
---
Changes in v5:
- Also add the DTS 'minItems' option for 'reg-names'.
- Add missing quotation marks to the DTS example change to make the DTS
bot hopefully happy.
- Link to v4: https://lore.kernel.org/r/20260415-pcie-intel-gw-v4-0-ad45d2418c8e@dev.tdt.de
Changes in v4:
- Add 'atu' to the end of the resource definition to ensure backwords
compatibility.
- Updated the commit description to explain why the MaxLinear SDK is used
as a reference.
- Remove 'Rahul Tanwar <rtanwar@maxlinear.com>' out of the loop, as the email
address is no longer valid and is being rejected.
- Link to v3: https://lore.kernel.org/r/20260401-pcie-intel-gw-v3-0-63b008c5b7b2@dev.tdt.de
Changes in v3:
- Update commit messages.
- Correct the sample code for dt bindings by adding the missing quotation
marks. Add 'minItems: 3' to avoid ABI issues.
- Move driver atu base assignment to probe function and keep backward
compatibility.
- Link to v2: https://lore.kernel.org/r/20260330-pcie-intel-gw-v2-0-8bd07367a298@dev.tdt.de
Changes in v2:
- Added additional information to the commit descriptions
- Add additional patch to mark driver as orphaned as the maintainer's
email no longer works.
- Fix wrong error path for enable clock before phy init.
- Add new patch to update the devicetree documentation for the 'atu'
resource
- Add additional recipients responsible for documenting the dervicetree
bindings.
- Link to v1: https://lore.kernel.org/r/20260317-pcie-intel-gw-v1-0-7fe13726ad4f@dev.tdt.de
---
Florian Eckert (7):
MAINTAINERS: Remove bouncing intel-gw maintainer
PCI: intel-gw: Remove unused define
PCI: intel-gw: Move interrupt enable to own function
PCI: intel-gw: Enable clock before phy init
PCI: intel-gw: Add start_link callback function
PCI: intel-gw: Move driver atu base assignment to probe function
dt-bindings: PCI: intel,lgm-pcie: Add atu resource
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 9 ++-
MAINTAINERS | 3 +-
drivers/pci/controller/dwc/pcie-intel-gw.c | 73 +++++++++++++++-------
3 files changed, 58 insertions(+), 27 deletions(-)
---
base-commit: 028ef9c96e96197026887c0f092424679298aae8
change-id: 20260317-pcie-intel-gw-50902113f9e1
Best regards,
--
Florian Eckert <fe@dev.tdt.de>
On Fri, 17 Apr 2026 10:35:44 +0200, Florian Eckert wrote:
> This series fixes and improve the 'intel-gw' driver to work again with
> the current dwc pcie framework. The following changes are:
>
> * Move interrupt 'enable' to its own function to improve readability,
> and add additional register writes just as the Maxlinear kernel does in
> their SDK.
> * Enable clock for the PHY before PHY init call.
> * Add missing 'start_link' callback. That was added to the PCIe dwc
> framework.
> * Move ATU base address assignment to the probe function and also add the
> the possibility to read it from the devicetree by dwc core.
> * Update devicetree documentation for intel-gw-pcie.yaml
> * Remove unused preprocessor define.
> * Mark driver as orphaned as the maitainer's email no longer works
>
> [...]
Applied, thanks!
[1/7] MAINTAINERS: Remove bouncing intel-gw maintainer
commit: 354379acf4f288642ca0d95793a67c780ccf9160
[2/7] PCI: intel-gw: Remove unused define
commit: d2c0d6d1731df43920f62bb2cf4540c163930aaa
[3/7] PCI: intel-gw: Move interrupt enable to own function
commit: c18faeb8b45eed1970cb6e218482c1914e3134eb
[4/7] PCI: intel-gw: Enable clock before phy init
commit: f1c454c22055fdf26b93a11dbbb57064e3319484
[5/7] PCI: intel-gw: Add start_link callback function
commit: a758d808c3b488926f74f28d3917a2af3ae8bbfc
[6/7] PCI: intel-gw: Move driver atu base assignment to probe function
commit: 91ef515328e716b70ab89af47789c15d39895ec1
[7/7] dt-bindings: PCI: intel,lgm-pcie: Add atu resource
commit: 5d14a593359d668475540a8b0ddd4489c71c8a3b
Best regards,
--
Manivannan Sadhasivam <mani@kernel.org>
Just a friendly reminder. I hope I’ve incorporated all your comments. If there’s anything else you’d like me to do, please let me know. On 2026-04-17 10:35, Florian Eckert wrote: > This series fixes and improve the 'intel-gw' driver to work again with > the current dwc pcie framework. The following changes are: > > * Move interrupt 'enable' to its own function to improve readability, > and add additional register writes just as the Maxlinear kernel does > in > their SDK. > * Enable clock for the PHY before PHY init call. > * Add missing 'start_link' callback. That was added to the PCIe dwc > framework. > * Move ATU base address assignment to the probe function and also add > the > the possibility to read it from the devicetree by dwc core. > * Update devicetree documentation for intel-gw-pcie.yaml > * Remove unused preprocessor define. > * Mark driver as orphaned as the maitainer's email no longer works > > Signed-off-by: Florian Eckert <fe@dev.tdt.de> > --- > Changes in v5: > - Also add the DTS 'minItems' option for 'reg-names'. > - Add missing quotation marks to the DTS example change to make the DTS > bot hopefully happy. > - Link to v4: > https://lore.kernel.org/r/20260415-pcie-intel-gw-v4-0-ad45d2418c8e@dev.tdt.de > > Changes in v4: > - Add 'atu' to the end of the resource definition to ensure backwords > compatibility. > - Updated the commit description to explain why the MaxLinear SDK is > used > as a reference. > - Remove 'Rahul Tanwar <rtanwar@maxlinear.com>' out of the loop, as the > email > address is no longer valid and is being rejected. > - Link to v3: > https://lore.kernel.org/r/20260401-pcie-intel-gw-v3-0-63b008c5b7b2@dev.tdt.de > > Changes in v3: > - Update commit messages. > - Correct the sample code for dt bindings by adding the missing > quotation > marks. Add 'minItems: 3' to avoid ABI issues. > - Move driver atu base assignment to probe function and keep backward > compatibility. > - Link to v2: > https://lore.kernel.org/r/20260330-pcie-intel-gw-v2-0-8bd07367a298@dev.tdt.de > > Changes in v2: > - Added additional information to the commit descriptions > - Add additional patch to mark driver as orphaned as the maintainer's > email no longer works. > - Fix wrong error path for enable clock before phy init. > - Add new patch to update the devicetree documentation for the 'atu' > resource > - Add additional recipients responsible for documenting the dervicetree > bindings. > - Link to v1: > https://lore.kernel.org/r/20260317-pcie-intel-gw-v1-0-7fe13726ad4f@dev.tdt.de > > --- > Florian Eckert (7): > MAINTAINERS: Remove bouncing intel-gw maintainer > PCI: intel-gw: Remove unused define > PCI: intel-gw: Move interrupt enable to own function > PCI: intel-gw: Enable clock before phy init > PCI: intel-gw: Add start_link callback function > PCI: intel-gw: Move driver atu base assignment to probe function > dt-bindings: PCI: intel,lgm-pcie: Add atu resource > > .../devicetree/bindings/pci/intel-gw-pcie.yaml | 9 ++- > MAINTAINERS | 3 +- > drivers/pci/controller/dwc/pcie-intel-gw.c | 73 > +++++++++++++++------- > 3 files changed, 58 insertions(+), 27 deletions(-) > --- > base-commit: 028ef9c96e96197026887c0f092424679298aae8 > change-id: 20260317-pcie-intel-gw-50902113f9e1 > > Best regards,
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