The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
which prevents the system from properly resuming from S3 warm boot where
the eMMC is necessary to pull in the boot components.

Add a quirk which prevents that specific device model from entering
SLEEP mode. There are no differences in the power consumption observed.

Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
 drivers/mmc/core/mmc.c    | 3 ++-
 drivers/mmc/core/quirks.h | 7 +++++++
 include/linux/mmc/card.h  | 1 +
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 7c86efb1044a..8471115f7fc9 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1958,7 +1958,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
 
 static bool mmc_card_can_sleep(struct mmc_card *card)
 {
-	return card->ext_csd.rev >= 3;
+	return card->ext_csd.rev >= 3 &&
+	       !(card->quirks & MMC_QUIRK_BROKEN_SLEEP);
 }
 
 static int mmc_sleep_busy_cb(void *cb_data, bool *busy)
diff --git a/drivers/mmc/core/quirks.h b/drivers/mmc/core/quirks.h
index c417ed34c057..dc6badf740f3 100644
--- a/drivers/mmc/core/quirks.h
+++ b/drivers/mmc/core/quirks.h
@@ -153,6 +153,13 @@ static const struct mmc_fixup __maybe_unused mmc_blk_fixups[] = {
 	MMC_FIXUP("M62704", CID_MANFID_KINGSTON, 0x0100, add_quirk_mmc,
 		  MMC_QUIRK_TRIM_BROKEN),
 
+	/*
+	 * Some Kioxia eMMC devices will not go into boot mode on CMD0 arg
+	 * after going into SLEEP state.
+	 */
+	MMC_FIXUP("016G01", CID_MANFID_TOSHIBA, 0x0100, add_quirk_mmc,
+		  MMC_QUIRK_BROKEN_SLEEP),
+
 	END_FIXUP
 };
 
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index e9e964c20e53..3812e9e79541 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -329,6 +329,7 @@ struct mmc_card {
 #define MMC_QUIRK_BROKEN_CACHE_FLUSH	(1<<16)	/* Don't flush cache until the write has occurred */
 #define MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY	(1<<17) /* Disable broken SD poweroff notify support */
 #define MMC_QUIRK_NO_UHS_DDR50_TUNING	(1<<18) /* Disable DDR50 tuning */
+#define MMC_QUIRK_BROKEN_SLEEP		(1<<19) /* Broken sleep mode */
 
 	bool			written_flag;	/* Indicates eMMC has been written since power on */
 	bool			reenable_cmdq;	/* Re-enable Command Queue */
-- 
2.43.0

On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
> which prevents the system from properly resuming from S3 warm boot where
> the eMMC is necessary to pull in the boot components.

Is the bug confirmed by Kioxia?

If not, can you explain a bit more what is actually happening during
system resume?

>
> Add a quirk which prevents that specific device model from entering
> SLEEP mode. There are no differences in the power consumption observed.
>
> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

Kind regards
Uffe

> ---
>  drivers/mmc/core/mmc.c    | 3 ++-
>  drivers/mmc/core/quirks.h | 7 +++++++
>  include/linux/mmc/card.h  | 1 +
>  3 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index 7c86efb1044a..8471115f7fc9 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -1958,7 +1958,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
>
>  static bool mmc_card_can_sleep(struct mmc_card *card)
>  {
> -       return card->ext_csd.rev >= 3;
> +       return card->ext_csd.rev >= 3 &&
> +              !(card->quirks & MMC_QUIRK_BROKEN_SLEEP);
>  }
>
>  static int mmc_sleep_busy_cb(void *cb_data, bool *busy)
> diff --git a/drivers/mmc/core/quirks.h b/drivers/mmc/core/quirks.h
> index c417ed34c057..dc6badf740f3 100644
> --- a/drivers/mmc/core/quirks.h
> +++ b/drivers/mmc/core/quirks.h
> @@ -153,6 +153,13 @@ static const struct mmc_fixup __maybe_unused mmc_blk_fixups[] = {
>         MMC_FIXUP("M62704", CID_MANFID_KINGSTON, 0x0100, add_quirk_mmc,
>                   MMC_QUIRK_TRIM_BROKEN),
>
> +       /*
> +        * Some Kioxia eMMC devices will not go into boot mode on CMD0 arg
> +        * after going into SLEEP state.
> +        */
> +       MMC_FIXUP("016G01", CID_MANFID_TOSHIBA, 0x0100, add_quirk_mmc,
> +                 MMC_QUIRK_BROKEN_SLEEP),
> +
>         END_FIXUP
>  };
>
> diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
> index e9e964c20e53..3812e9e79541 100644
> --- a/include/linux/mmc/card.h
> +++ b/include/linux/mmc/card.h
> @@ -329,6 +329,7 @@ struct mmc_card {
>  #define MMC_QUIRK_BROKEN_CACHE_FLUSH   (1<<16) /* Don't flush cache until the write has occurred */
>  #define MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY    (1<<17) /* Disable broken SD poweroff notify support */
>  #define MMC_QUIRK_NO_UHS_DDR50_TUNING  (1<<18) /* Disable DDR50 tuning */
> +#define MMC_QUIRK_BROKEN_SLEEP         (1<<19) /* Broken sleep mode */
>
>         bool                    written_flag;   /* Indicates eMMC has been written since power on */
>         bool                    reenable_cmdq;  /* Re-enable Command Queue */
> --
> 2.43.0
>
>

On 5/11/26 07:18, Ulf Hansson wrote:
> On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
> <florian.fainelli@broadcom.com> wrote:
>>
>> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
>> which prevents the system from properly resuming from S3 warm boot where
>> the eMMC is necessary to pull in the boot components.
> 
> Is the bug confirmed by Kioxia?

We've been going back and forth with them without much progress as far 
as a resolution goes. Since there was no progress and I would like to 
get this included in downstream kernels at some point, this was submitted.

> 
> If not, can you explain a bit more what is actually happening during
> system resume?

Upon entering Suspend-to-DRAM, the eMMC will be put into sleep mode. 
When our systems resume, one of our hardware cores driving the eMMC (HIF 
block) in command mode will send a CMD0 command for the eMMC device to 
exit SLEEP mode. The Kioxia 016G01 device takes 10ms rather than the 
tSLEEP_EXIT value of 1ms which is advertised and so our HIF block does 
not see the Boot ACK pattern in time and does not service the read 
request from the processor that wanted to read from eMMC, we get a reset 
of the system, rather than continue booting.

When SLEEP is not enabled, the eMMC device responds within tSLEEP_EXIT 
as advertised and we don't have that problem.

So I suppose I could reformulate the commit message and give some more 
details here if you would like?
-- 
Florian

On Mon, 11 May 2026 at 18:01, Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> On 5/11/26 07:18, Ulf Hansson wrote:
> > On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
> > <florian.fainelli@broadcom.com> wrote:
> >>
> >> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
> >> which prevents the system from properly resuming from S3 warm boot where
> >> the eMMC is necessary to pull in the boot components.
> >
> > Is the bug confirmed by Kioxia?
>
> We've been going back and forth with them without much progress as far
> as a resolution goes. Since there was no progress and I would like to
> get this included in downstream kernels at some point, this was submitted.
>
> >
> > If not, can you explain a bit more what is actually happening during
> > system resume?
>
> Upon entering Suspend-to-DRAM, the eMMC will be put into sleep mode.
> When our systems resume, one of our hardware cores driving the eMMC (HIF
> block) in command mode will send a CMD0 command for the eMMC device to

Is the CMD0 sent solely by HW/FW before the mmc core executes
_mmc_resume() during system resume?

> exit SLEEP mode. The Kioxia 016G01 device takes 10ms rather than the
> tSLEEP_EXIT value of 1ms which is advertised and so our HIF block does

Can you please clarify what tSLEEP_EXIT refers to? Are you referring
to the S_A_TIMEOUT in the EXT_CSD register for the eMMC card?

Anyway, waking up an eMMC from sleep state in just 1ms sounds a bit
optimistic to me.

> not see the Boot ACK pattern in time and does not service the read
> request from the processor that wanted to read from eMMC, we get a reset
> of the system, rather than continue booting.
>
> When SLEEP is not enabled, the eMMC device responds within tSLEEP_EXIT
> as advertised and we don't have that problem.

Okay, I see.

In this regard, it's important to understand for me how the mmc host
driver (and the HW/FW) manages VCC and VCCQ when the mmc core calls
mmc_power_off() from _mmc_suspend()?

Does this turn off any of these regulators or what happens to them
during system suspend?

>
> So I suppose I could reformulate the commit message and give some more
> details here if you would like?

Yes, but let's discuss a bit more first.

Kind regards
Uffe

On 5/12/26 06:33, Ulf Hansson wrote:
> On Mon, 11 May 2026 at 18:01, Florian Fainelli
> <florian.fainelli@broadcom.com> wrote:
>>
>> On 5/11/26 07:18, Ulf Hansson wrote:
>>> On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
>>> <florian.fainelli@broadcom.com> wrote:
>>>>
>>>> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
>>>> which prevents the system from properly resuming from S3 warm boot where
>>>> the eMMC is necessary to pull in the boot components.
>>>
>>> Is the bug confirmed by Kioxia?
>>
>> We've been going back and forth with them without much progress as far
>> as a resolution goes. Since there was no progress and I would like to
>> get this included in downstream kernels at some point, this was submitted.
>>
>>>
>>> If not, can you explain a bit more what is actually happening during
>>> system resume?
>>
>> Upon entering Suspend-to-DRAM, the eMMC will be put into sleep mode.
>> When our systems resume, one of our hardware cores driving the eMMC (HIF
>> block) in command mode will send a CMD0 command for the eMMC device to
> 
> Is the CMD0 sent solely by HW/FW before the mmc core executes
> _mmc_resume() during system resume?

That is correct. The sequence basically goes like this: HW sends CMD0, 
then FW pulls in boot code, identifies this is a Suspend to DRAM, does 
its steps, and eventually Linux resumes and calls _mmc_resume().

> 
>> exit SLEEP mode. The Kioxia 016G01 device takes 10ms rather than the
>> tSLEEP_EXIT value of 1ms which is advertised and so our HIF block does
> 
> Can you please clarify what tSLEEP_EXIT refers to? Are you referring
> to the S_A_TIMEOUT in the EXT_CSD register for the eMMC card?

Yes, sorry I am referring to S_A_TIMEOUT in the EXT_CSD register.

> 
> Anyway, waking up an eMMC from sleep state in just 1ms sounds a bit
> optimistic to me.

Fair enough, but AFAIR we wait up to 30ms before declaring a timeout, 
every other vendor we have seen exits and acknowledges boot within 
1-10ms at most. Similarly if the device is not in SLEEP, then it 
acknowledges boot within 1ms.

> 
>> not see the Boot ACK pattern in time and does not service the read
>> request from the processor that wanted to read from eMMC, we get a reset
>> of the system, rather than continue booting.
>>
>> When SLEEP is not enabled, the eMMC device responds within tSLEEP_EXIT
>> as advertised and we don't have that problem.
> 
> Okay, I see.
> 
> In this regard, it's important to understand for me how the mmc host
> driver (and the HW/FW) manages VCC and VCCQ when the mmc core calls
> mmc_power_off() from _mmc_suspend()?
> 
> Does this turn off any of these regulators or what happens to them
> during system suspend?

We don't have software controlled regulators for VCC and VCCQ and our 
reference boards using that specific eMMC device keep it powered on 
through suspend-to-DRAM. This is the very reason why if it stays in 
sleep mode, powered on, and then we attempt to boot from eMMC we have 
this issue.

> 
>>
>> So I suppose I could reformulate the commit message and give some more
>> details here if you would like?
> 
> Yes, but let's discuss a bit more first.
> 
> Kind regards
> Uffe


-- 
Florian

On Tue, May 19, 2026 at 5:27 AM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> On 5/12/26 06:33, Ulf Hansson wrote:
> > On Mon, 11 May 2026 at 18:01, Florian Fainelli
> > <florian.fainelli@broadcom.com> wrote:
> >>
> >> On 5/11/26 07:18, Ulf Hansson wrote:
> >>> On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
> >>> <florian.fainelli@broadcom.com> wrote:
> >>>>
> >>>> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
> >>>> which prevents the system from properly resuming from S3 warm boot where
> >>>> the eMMC is necessary to pull in the boot components.
> >>>
> >>> Is the bug confirmed by Kioxia?
> >>
> >> We've been going back and forth with them without much progress as far
> >> as a resolution goes. Since there was no progress and I would like to
> >> get this included in downstream kernels at some point, this was submitted.
> >>
> >>>
> >>> If not, can you explain a bit more what is actually happening during
> >>> system resume?
> >>
> >> Upon entering Suspend-to-DRAM, the eMMC will be put into sleep mode.
> >> When our systems resume, one of our hardware cores driving the eMMC (HIF
> >> block) in command mode will send a CMD0 command for the eMMC device to
> >
> > Is the CMD0 sent solely by HW/FW before the mmc core executes
> > _mmc_resume() during system resume?
>
> That is correct. The sequence basically goes like this: HW sends CMD0,
> then FW pulls in boot code, identifies this is a Suspend to DRAM, does
> its steps, and eventually Linux resumes and calls _mmc_resume().

Okay, so it seems like this problem boils down to the fact that the FW
decides to send a CMD0 command for no good reason at system resume.
Unless I am missing a point here?

The problem is that the FW doesn't know what low power state the
kernel decided to put the eMMC device into at system suspend, hence it
should really leave the decision to the kernel to wake up the eMMC at
system resume.

Would it be possible to fix the FW instead?

>
> >
> >> exit SLEEP mode. The Kioxia 016G01 device takes 10ms rather than the
> >> tSLEEP_EXIT value of 1ms which is advertised and so our HIF block does
> >
> > Can you please clarify what tSLEEP_EXIT refers to? Are you referring
> > to the S_A_TIMEOUT in the EXT_CSD register for the eMMC card?
>
> Yes, sorry I am referring to S_A_TIMEOUT in the EXT_CSD register.
>
> >
> > Anyway, waking up an eMMC from sleep state in just 1ms sounds a bit
> > optimistic to me.
>
> Fair enough, but AFAIR we wait up to 30ms before declaring a timeout,
> every other vendor we have seen exits and acknowledges boot within
> 1-10ms at most. Similarly if the device is not in SLEEP, then it
> acknowledges boot within 1ms.

The S_A_TIMEOUT specifies the time the eMMC needs to complete the wake
up from its sleep state.

If the device isn't in sleep state but fully powered-on (as it seems
to be what you have been playing with), the eMMC should just respond
immediately as with any other command when the eMMC is in "TRAN"
state. I assume that's why it works if we don't send the CMD5 (sleep)
command at system suspend.

>
> >
> >> not see the Boot ACK pattern in time and does not service the read
> >> request from the processor that wanted to read from eMMC, we get a reset
> >> of the system, rather than continue booting.
> >>
> >> When SLEEP is not enabled, the eMMC device responds within tSLEEP_EXIT
> >> as advertised and we don't have that problem.
> >
> > Okay, I see.
> >
> > In this regard, it's important to understand for me how the mmc host
> > driver (and the HW/FW) manages VCC and VCCQ when the mmc core calls
> > mmc_power_off() from _mmc_suspend()?
> >
> > Does this turn off any of these regulators or what happens to them
> > during system suspend?
>
> We don't have software controlled regulators for VCC and VCCQ and our
> reference boards using that specific eMMC device keep it powered on
> through suspend-to-DRAM. This is the very reason why if it stays in
> sleep mode, powered on, and then we attempt to boot from eMMC we have
> this issue.

Okay, thanks for elaborating.

So you are mixing the system suspend/resume scenarios with boot here.
Is the problem for both?

I understand the timeout problem, but not why the FW needs to send the
CMD0 to wake up the eMMC from system suspend. In regards to boot, that
is an entirely different scenario.

Does the FW need to read something from the eMMC before the system
resumes? Or that is just during boot?

[...]

Kind regards
Uffe

On 5/18/26 20:27, Florian Fainelli wrote:
> On 5/12/26 06:33, Ulf Hansson wrote:
>> On Mon, 11 May 2026 at 18:01, Florian Fainelli
>> <florian.fainelli@broadcom.com> wrote:
>>>
>>> On 5/11/26 07:18, Ulf Hansson wrote:
>>>> On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
>>>> <florian.fainelli@broadcom.com> wrote:
>>>>>
>>>>> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending 
>>>>> CMD0
>>>>> which prevents the system from properly resuming from S3 warm boot 
>>>>> where
>>>>> the eMMC is necessary to pull in the boot components.
>>>>
>>>> Is the bug confirmed by Kioxia?
>>>
>>> We've been going back and forth with them without much progress as far
>>> as a resolution goes. Since there was no progress and I would like to
>>> get this included in downstream kernels at some point, this was 
>>> submitted.
>>>
>>>>
>>>> If not, can you explain a bit more what is actually happening during
>>>> system resume?
>>>
>>> Upon entering Suspend-to-DRAM, the eMMC will be put into sleep mode.
>>> When our systems resume, one of our hardware cores driving the eMMC (HIF
>>> block) in command mode will send a CMD0 command for the eMMC device to
>>
>> Is the CMD0 sent solely by HW/FW before the mmc core executes
>> _mmc_resume() during system resume?
> 
> That is correct. The sequence basically goes like this: HW sends CMD0, 
> then FW pulls in boot code, identifies this is a Suspend to DRAM, does 
> its steps, and eventually Linux resumes and calls _mmc_resume().
> 
>>
>>> exit SLEEP mode. The Kioxia 016G01 device takes 10ms rather than the
>>> tSLEEP_EXIT value of 1ms which is advertised and so our HIF block does
>>
>> Can you please clarify what tSLEEP_EXIT refers to? Are you referring
>> to the S_A_TIMEOUT in the EXT_CSD register for the eMMC card?
> 
> Yes, sorry I am referring to S_A_TIMEOUT in the EXT_CSD register.
> 
>>
>> Anyway, waking up an eMMC from sleep state in just 1ms sounds a bit
>> optimistic to me.
> 
> Fair enough, but AFAIR we wait up to 30ms before declaring a timeout, 
> every other vendor we have seen exits and acknowledges boot within 
> 1-10ms at most. Similarly if the device is not in SLEEP, then it 
> acknowledges boot within 1ms.
> 
>>
>>> not see the Boot ACK pattern in time and does not service the read
>>> request from the processor that wanted to read from eMMC, we get a reset
>>> of the system, rather than continue booting.
>>>
>>> When SLEEP is not enabled, the eMMC device responds within tSLEEP_EXIT
>>> as advertised and we don't have that problem.
>>
>> Okay, I see.
>>
>> In this regard, it's important to understand for me how the mmc host
>> driver (and the HW/FW) manages VCC and VCCQ when the mmc core calls
>> mmc_power_off() from _mmc_suspend()?
>>
>> Does this turn off any of these regulators or what happens to them
>> during system suspend?
> 
> We don't have software controlled regulators for VCC and VCCQ and our 
> reference boards using that specific eMMC device keep it powered on 
> through suspend-to-DRAM. This is the very reason why if it stays in 
> sleep mode, powered on, and then we attempt to boot from eMMC we have 
> this issue.
> 
>>
>>>
>>> So I suppose I could reformulate the commit message and give some more
>>> details here if you would like?
>>
>> Yes, but let's discuss a bit more first.

Ulf, did you want me to re-submit with that kind of detail added to the 
commit message? Also since this is a bit specific to our devices, did 
you need me to scope the fixup to the ARCH_BRCMSTB platforms somehow?

Thanks!
-- 
Florian

On Thu, May 28, 2026 at 1:41 AM Florian Fainelli
<florian.fainelli@broadcom.com> wrote:
>
> On 5/18/26 20:27, Florian Fainelli wrote:
> > On 5/12/26 06:33, Ulf Hansson wrote:
> >> On Mon, 11 May 2026 at 18:01, Florian Fainelli
> >> <florian.fainelli@broadcom.com> wrote:
> >>>
> >>> On 5/11/26 07:18, Ulf Hansson wrote:
> >>>> On Mon, 13 Apr 2026 at 20:06, Florian Fainelli
> >>>> <florian.fainelli@broadcom.com> wrote:
> >>>>>
> >>>>> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending
> >>>>> CMD0
> >>>>> which prevents the system from properly resuming from S3 warm boot
> >>>>> where
> >>>>> the eMMC is necessary to pull in the boot components.
> >>>>
> >>>> Is the bug confirmed by Kioxia?
> >>>
> >>> We've been going back and forth with them without much progress as far
> >>> as a resolution goes. Since there was no progress and I would like to
> >>> get this included in downstream kernels at some point, this was
> >>> submitted.
> >>>
> >>>>
> >>>> If not, can you explain a bit more what is actually happening during
> >>>> system resume?
> >>>
> >>> Upon entering Suspend-to-DRAM, the eMMC will be put into sleep mode.
> >>> When our systems resume, one of our hardware cores driving the eMMC (HIF
> >>> block) in command mode will send a CMD0 command for the eMMC device to
> >>
> >> Is the CMD0 sent solely by HW/FW before the mmc core executes
> >> _mmc_resume() during system resume?
> >
> > That is correct. The sequence basically goes like this: HW sends CMD0,
> > then FW pulls in boot code, identifies this is a Suspend to DRAM, does
> > its steps, and eventually Linux resumes and calls _mmc_resume().
> >
> >>
> >>> exit SLEEP mode. The Kioxia 016G01 device takes 10ms rather than the
> >>> tSLEEP_EXIT value of 1ms which is advertised and so our HIF block does
> >>
> >> Can you please clarify what tSLEEP_EXIT refers to? Are you referring
> >> to the S_A_TIMEOUT in the EXT_CSD register for the eMMC card?
> >
> > Yes, sorry I am referring to S_A_TIMEOUT in the EXT_CSD register.
> >
> >>
> >> Anyway, waking up an eMMC from sleep state in just 1ms sounds a bit
> >> optimistic to me.
> >
> > Fair enough, but AFAIR we wait up to 30ms before declaring a timeout,
> > every other vendor we have seen exits and acknowledges boot within
> > 1-10ms at most. Similarly if the device is not in SLEEP, then it
> > acknowledges boot within 1ms.
> >
> >>
> >>> not see the Boot ACK pattern in time and does not service the read
> >>> request from the processor that wanted to read from eMMC, we get a reset
> >>> of the system, rather than continue booting.
> >>>
> >>> When SLEEP is not enabled, the eMMC device responds within tSLEEP_EXIT
> >>> as advertised and we don't have that problem.
> >>
> >> Okay, I see.
> >>
> >> In this regard, it's important to understand for me how the mmc host
> >> driver (and the HW/FW) manages VCC and VCCQ when the mmc core calls
> >> mmc_power_off() from _mmc_suspend()?
> >>
> >> Does this turn off any of these regulators or what happens to them
> >> during system suspend?
> >
> > We don't have software controlled regulators for VCC and VCCQ and our
> > reference boards using that specific eMMC device keep it powered on
> > through suspend-to-DRAM. This is the very reason why if it stays in
> > sleep mode, powered on, and then we attempt to boot from eMMC we have
> > this issue.
> >
> >>
> >>>
> >>> So I suppose I could reformulate the commit message and give some more
> >>> details here if you would like?
> >>
> >> Yes, but let's discuss a bit more first.
>
> Ulf, did you want me to re-submit with that kind of detail added to the
> commit message? Also since this is a bit specific to our devices, did
> you need me to scope the fixup to the ARCH_BRCMSTB platforms somehow?

Apologize for the delay, I have been a bit busy with administrative
kind of work when changing employment.

I will respond as soon as I can to your previous email to help figure
out the way forward.

Kind regards
Uffe

On 4/13/26 11:05, Florian Fainelli wrote:
> The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
> which prevents the system from properly resuming from S3 warm boot where
> the eMMC is necessary to pull in the boot components.
> 
> Add a quirk which prevents that specific device model from entering
> SLEEP mode. There are no differences in the power consumption observed.
> 
> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

Any feedback on this?
-- 
Florian

Hi Florian,

On Wed, May 06, 2026 at 09:49:46AM -0700, Florian Fainelli wrote:
> On 4/13/26 11:05, Florian Fainelli wrote:
> > The Kioxia 016G01 eMMC device does not exit SLEEP mode when sending CMD0
> > which prevents the system from properly resuming from S3 warm boot where
> > the eMMC is necessary to pull in the boot components.
> > 
> > Add a quirk which prevents that specific device model from entering
> > SLEEP mode. There are no differences in the power consumption observed.
> > 
> > Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
> 
> Any feedback on this?

Hm, can the sleep call be executed before mmcblk driver is loaded?
For example by under-voltage signal? In this case the quirk will not
be applied. May be better to put this quirk in mmc_ext_csd_fixups[]?

Best Regards,
Oleksij
-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |