Dear maintainers,

The purpose of this patch series is to fix the PERST# control timing
in the MediaTek PCIe Gen3 controller driver so that it complies with
the PCIe CEM specification.

In the current MediaTek PCIe Gen3 controller driver, there are two
issues with PERST# timing:
1. During the power-up phase (i.e., before PCIe link-up), on some
MediaTek SoCs PERST# is de-asserted before the REFCLK becomes stable;
2. During system shutdown, PERST# is not asserted before power is
removed.

Patch 1 fixes the reset signal sequencing during the power-up phase.

Patch 2 adds a shutdown callback to control PERST# during system
shutdown.

Best regards,
Jian Yang

Jian Yang (2):
  PCI: mediatek-gen3: Fix PERST# control sequence at system startup
    phase
  PCI: mediatek-gen3: Add shutdown callback to cotnrol PERST# signal

 drivers/pci/controller/pcie-mediatek-gen3.c | 30 ++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

-- 
2.45.2

On Mon, 13 Apr 2026 15:13:54 +0800, Jian Yang wrote:
> The purpose of this patch series is to fix the PERST# control timing
> in the MediaTek PCIe Gen3 controller driver so that it complies with
> the PCIe CEM specification.
> 
> In the current MediaTek PCIe Gen3 controller driver, there are two
> issues with PERST# timing:
> 1. During the power-up phase (i.e., before PCIe link-up), on some
> MediaTek SoCs PERST# is de-asserted before the REFCLK becomes stable;
> 2. During system shutdown, PERST# is not asserted before power is
> removed.
> 
> [...]

Applied, thanks!

[1/2] PCI: mediatek-gen3: Fix PERST# control timing during system startup
      commit: bcc32882066156029e1e9ea16a3c3b8f3100cc3d
[2/2] PCI: mediatek-gen3: Add a shutdown callback to cotnrol PERST# signal
      commit: c019c3ad821ec38ee158cda4be5ab8e39d2d5c6b

Best regards,
-- 
Manivannan Sadhasivam <mani@kernel.org>