arch/loongarch/include/asm/cpu-features.h | 1 + arch/loongarch/include/asm/cpu.h | 2 + arch/loongarch/include/asm/inst.h | 10 + arch/loongarch/include/uapi/asm/hwcap.h | 1 + arch/loongarch/kernel/cpu-probe.c | 4 + arch/loongarch/kernel/proc.c | 2 + arch/loongarch/net/bpf_jit.c | 190 +++++++++++++++++- tools/testing/selftests/bpf/progs/bpf_misc.h | 4 +- .../selftests/bpf/progs/verifier_precision.c | 4 +- 9 files changed, 203 insertions(+), 15 deletions(-)
v3: Modify emit_atomic_ld_st() to use ld[x].{bu,hu,wu} instructions.
v2: Modify show_cpuinfo() to add lam_bh capability, no other changes.
This series is based on 7.0, the aim is to support more instructions:
(1) 8 and 16 bit read-modify-write instructions,
(2) load-acquire and store-release instructions.
When compiling, please set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS and
unset CONFIG_BPF_UNPRIV_DEFAULT_OFF.
All of the related testcases passed and no regressions for bpf selftests.
Here are the test results on LoongArch:
$ sudo ./test_progs -t verifier_load_acquire
#577/1 verifier_load_acquire/load-acquire, 8-bit:OK
#577/2 verifier_load_acquire/load-acquire, 8-bit @unpriv:OK
#577/3 verifier_load_acquire/load-acquire, 16-bit:OK
#577/4 verifier_load_acquire/load-acquire, 16-bit @unpriv:OK
#577/5 verifier_load_acquire/load-acquire, 32-bit:OK
#577/6 verifier_load_acquire/load-acquire, 32-bit @unpriv:OK
#577/7 verifier_load_acquire/load-acquire, 64-bit:OK
#577/8 verifier_load_acquire/load-acquire, 64-bit @unpriv:OK
#577/9 verifier_load_acquire/load-acquire with uninitialized src_reg:OK
#577/10 verifier_load_acquire/load-acquire with uninitialized src_reg @unpriv:OK
#577/11 verifier_load_acquire/load-acquire with non-pointer src_reg:OK
#577/12 verifier_load_acquire/load-acquire with non-pointer src_reg @unpriv:OK
#577/13 verifier_load_acquire/misaligned load-acquire:OK
#577/14 verifier_load_acquire/misaligned load-acquire @unpriv:OK
#577/15 verifier_load_acquire/load-acquire from ctx pointer:OK
#577/16 verifier_load_acquire/load-acquire from ctx pointer @unpriv:OK
#577/17 verifier_load_acquire/load-acquire with invalid register R15:OK
#577/18 verifier_load_acquire/load-acquire with invalid register R15 @unpriv:OK
#577/19 verifier_load_acquire/load-acquire from pkt pointer:OK
#577/20 verifier_load_acquire/load-acquire from flow_keys pointer:OK
#577/21 verifier_load_acquire/load-acquire from sock pointer:OK
#577 verifier_load_acquire:OK
Summary: 1/21 PASSED, 0 SKIPPED, 0 FAILED
$ sudo ./test_progs -t verifier_store_release
#615/1 verifier_store_release/store-release, 8-bit:OK
#615/2 verifier_store_release/store-release, 8-bit @unpriv:OK
#615/3 verifier_store_release/store-release, 16-bit:OK
#615/4 verifier_store_release/store-release, 16-bit @unpriv:OK
#615/5 verifier_store_release/store-release, 32-bit:OK
#615/6 verifier_store_release/store-release, 32-bit @unpriv:OK
#615/7 verifier_store_release/store-release, 64-bit:OK
#615/8 verifier_store_release/store-release, 64-bit @unpriv:OK
#615/9 verifier_store_release/store-release with uninitialized src_reg:OK
#615/10 verifier_store_release/store-release with uninitialized src_reg @unpriv:OK
#615/11 verifier_store_release/store-release with uninitialized dst_reg:OK
#615/12 verifier_store_release/store-release with uninitialized dst_reg @unpriv:OK
#615/13 verifier_store_release/store-release with non-pointer dst_reg:OK
#615/14 verifier_store_release/store-release with non-pointer dst_reg @unpriv:OK
#615/15 verifier_store_release/misaligned store-release:OK
#615/16 verifier_store_release/misaligned store-release @unpriv:OK
#615/17 verifier_store_release/store-release to ctx pointer:OK
#615/18 verifier_store_release/store-release to ctx pointer @unpriv:OK
#615/19 verifier_store_release/store-release, leak pointer to stack:OK
#615/20 verifier_store_release/store-release, leak pointer to stack @unpriv:OK
#615/21 verifier_store_release/store-release, leak pointer to map:OK
#615/22 verifier_store_release/store-release, leak pointer to map @unpriv:OK
#615/23 verifier_store_release/store-release with invalid register R15:OK
#615/24 verifier_store_release/store-release with invalid register R15 @unpriv:OK
#615/25 verifier_store_release/store-release to pkt pointer:OK
#615/26 verifier_store_release/store-release to flow_keys pointer:OK
#615/27 verifier_store_release/store-release to sock pointer:OK
#615 verifier_store_release:OK
Summary: 1/27 PASSED, 0 SKIPPED, 0 FAILED
$ sudo ./test_progs -t verifier_precision/bpf_load_acquire
#596/5 verifier_precision/bpf_load_acquire:OK
#596 verifier_precision:OK
Summary: 1/1 PASSED, 0 SKIPPED, 0 FAILED
$ sudo ./test_progs -t verifier_precision/bpf_store_release
#596/6 verifier_precision/bpf_store_release:OK
#596 verifier_precision:OK
Summary: 1/1 PASSED, 0 SKIPPED, 0 FAILED
$ sudo ./test_progs -t compute_live_registers/atomic_load_acq_store_rel
#80/7 compute_live_registers/atomic_load_acq_store_rel:OK
#80 compute_live_registers:OK
Summary: 1/1 PASSED, 0 SKIPPED, 0 FAILED
Tiezhu Yang (5):
LoongArch: Define instruction formats for AM{SWAP/ADD}.{B/H} and DBAR
LoongArch: BPF: Add the default case in emit_atomic() and rename it
LoongArch: BPF: Support 8 and 16 bit read-modify-write instructions
LoongArch: BPF: Support load-acquire and store-release instructions
selftests/bpf: Make CAN_USE_LOAD_ACQ_STORE_REL usable for LoongArch
arch/loongarch/include/asm/cpu-features.h | 1 +
arch/loongarch/include/asm/cpu.h | 2 +
arch/loongarch/include/asm/inst.h | 10 +
arch/loongarch/include/uapi/asm/hwcap.h | 1 +
arch/loongarch/kernel/cpu-probe.c | 4 +
arch/loongarch/kernel/proc.c | 2 +
arch/loongarch/net/bpf_jit.c | 190 +++++++++++++++++-
tools/testing/selftests/bpf/progs/bpf_misc.h | 4 +-
.../selftests/bpf/progs/verifier_precision.c | 4 +-
9 files changed, 203 insertions(+), 15 deletions(-)
--
2.42.0
Hi, Tiezhu,
Maybe we need V4? If so, please submit as soon as possible.
Huacai
On Mon, Apr 13, 2026 at 12:05 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
>
> v3: Modify emit_atomic_ld_st() to use ld[x].{bu,hu,wu} instructions.
>
> v2: Modify show_cpuinfo() to add lam_bh capability, no other changes.
>
> This series is based on 7.0, the aim is to support more instructions:
> (1) 8 and 16 bit read-modify-write instructions,
> (2) load-acquire and store-release instructions.
>
> When compiling, please set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS and
> unset CONFIG_BPF_UNPRIV_DEFAULT_OFF.
>
> All of the related testcases passed and no regressions for bpf selftests.
> Here are the test results on LoongArch:
>
> $ sudo ./test_progs -t verifier_load_acquire
> #577/1 verifier_load_acquire/load-acquire, 8-bit:OK
> #577/2 verifier_load_acquire/load-acquire, 8-bit @unpriv:OK
> #577/3 verifier_load_acquire/load-acquire, 16-bit:OK
> #577/4 verifier_load_acquire/load-acquire, 16-bit @unpriv:OK
> #577/5 verifier_load_acquire/load-acquire, 32-bit:OK
> #577/6 verifier_load_acquire/load-acquire, 32-bit @unpriv:OK
> #577/7 verifier_load_acquire/load-acquire, 64-bit:OK
> #577/8 verifier_load_acquire/load-acquire, 64-bit @unpriv:OK
> #577/9 verifier_load_acquire/load-acquire with uninitialized src_reg:OK
> #577/10 verifier_load_acquire/load-acquire with uninitialized src_reg @unpriv:OK
> #577/11 verifier_load_acquire/load-acquire with non-pointer src_reg:OK
> #577/12 verifier_load_acquire/load-acquire with non-pointer src_reg @unpriv:OK
> #577/13 verifier_load_acquire/misaligned load-acquire:OK
> #577/14 verifier_load_acquire/misaligned load-acquire @unpriv:OK
> #577/15 verifier_load_acquire/load-acquire from ctx pointer:OK
> #577/16 verifier_load_acquire/load-acquire from ctx pointer @unpriv:OK
> #577/17 verifier_load_acquire/load-acquire with invalid register R15:OK
> #577/18 verifier_load_acquire/load-acquire with invalid register R15 @unpriv:OK
> #577/19 verifier_load_acquire/load-acquire from pkt pointer:OK
> #577/20 verifier_load_acquire/load-acquire from flow_keys pointer:OK
> #577/21 verifier_load_acquire/load-acquire from sock pointer:OK
> #577 verifier_load_acquire:OK
> Summary: 1/21 PASSED, 0 SKIPPED, 0 FAILED
>
> $ sudo ./test_progs -t verifier_store_release
> #615/1 verifier_store_release/store-release, 8-bit:OK
> #615/2 verifier_store_release/store-release, 8-bit @unpriv:OK
> #615/3 verifier_store_release/store-release, 16-bit:OK
> #615/4 verifier_store_release/store-release, 16-bit @unpriv:OK
> #615/5 verifier_store_release/store-release, 32-bit:OK
> #615/6 verifier_store_release/store-release, 32-bit @unpriv:OK
> #615/7 verifier_store_release/store-release, 64-bit:OK
> #615/8 verifier_store_release/store-release, 64-bit @unpriv:OK
> #615/9 verifier_store_release/store-release with uninitialized src_reg:OK
> #615/10 verifier_store_release/store-release with uninitialized src_reg @unpriv:OK
> #615/11 verifier_store_release/store-release with uninitialized dst_reg:OK
> #615/12 verifier_store_release/store-release with uninitialized dst_reg @unpriv:OK
> #615/13 verifier_store_release/store-release with non-pointer dst_reg:OK
> #615/14 verifier_store_release/store-release with non-pointer dst_reg @unpriv:OK
> #615/15 verifier_store_release/misaligned store-release:OK
> #615/16 verifier_store_release/misaligned store-release @unpriv:OK
> #615/17 verifier_store_release/store-release to ctx pointer:OK
> #615/18 verifier_store_release/store-release to ctx pointer @unpriv:OK
> #615/19 verifier_store_release/store-release, leak pointer to stack:OK
> #615/20 verifier_store_release/store-release, leak pointer to stack @unpriv:OK
> #615/21 verifier_store_release/store-release, leak pointer to map:OK
> #615/22 verifier_store_release/store-release, leak pointer to map @unpriv:OK
> #615/23 verifier_store_release/store-release with invalid register R15:OK
> #615/24 verifier_store_release/store-release with invalid register R15 @unpriv:OK
> #615/25 verifier_store_release/store-release to pkt pointer:OK
> #615/26 verifier_store_release/store-release to flow_keys pointer:OK
> #615/27 verifier_store_release/store-release to sock pointer:OK
> #615 verifier_store_release:OK
> Summary: 1/27 PASSED, 0 SKIPPED, 0 FAILED
>
> $ sudo ./test_progs -t verifier_precision/bpf_load_acquire
> #596/5 verifier_precision/bpf_load_acquire:OK
> #596 verifier_precision:OK
> Summary: 1/1 PASSED, 0 SKIPPED, 0 FAILED
>
> $ sudo ./test_progs -t verifier_precision/bpf_store_release
> #596/6 verifier_precision/bpf_store_release:OK
> #596 verifier_precision:OK
> Summary: 1/1 PASSED, 0 SKIPPED, 0 FAILED
>
> $ sudo ./test_progs -t compute_live_registers/atomic_load_acq_store_rel
> #80/7 compute_live_registers/atomic_load_acq_store_rel:OK
> #80 compute_live_registers:OK
> Summary: 1/1 PASSED, 0 SKIPPED, 0 FAILED
>
> Tiezhu Yang (5):
> LoongArch: Define instruction formats for AM{SWAP/ADD}.{B/H} and DBAR
> LoongArch: BPF: Add the default case in emit_atomic() and rename it
> LoongArch: BPF: Support 8 and 16 bit read-modify-write instructions
> LoongArch: BPF: Support load-acquire and store-release instructions
> selftests/bpf: Make CAN_USE_LOAD_ACQ_STORE_REL usable for LoongArch
>
> arch/loongarch/include/asm/cpu-features.h | 1 +
> arch/loongarch/include/asm/cpu.h | 2 +
> arch/loongarch/include/asm/inst.h | 10 +
> arch/loongarch/include/uapi/asm/hwcap.h | 1 +
> arch/loongarch/kernel/cpu-probe.c | 4 +
> arch/loongarch/kernel/proc.c | 2 +
> arch/loongarch/net/bpf_jit.c | 190 +++++++++++++++++-
> tools/testing/selftests/bpf/progs/bpf_misc.h | 4 +-
> .../selftests/bpf/progs/verifier_precision.c | 4 +-
> 9 files changed, 203 insertions(+), 15 deletions(-)
>
> --
> 2.42.0
>
On 4/21/26 20:38, Huacai Chen wrote: > Hi, Tiezhu, > > Maybe we need V4? If so, please submit as soon as possible. For now, TBH, I do not want to do that. Patch #1 is OK. Patch #2 is OK. Patch #3 is OK according to Wang Rui's reply. Patch #4 has no big problems, the current testcases passed, I am not sure whether it has problem, I can fix it if there is a real problem, maybe it needs to update the testcase first. patch #5 is OK, hope you can replace "usable" with "enable" in the patch subject and commit message when applying. Thanks, Tiezhu
On Tue, Apr 21, 2026 at 9:24 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote: > > On 4/21/26 20:38, Huacai Chen wrote: > > Hi, Tiezhu, > > > > Maybe we need V4? If so, please submit as soon as possible. > > For now, TBH, I do not want to do that. > > Patch #1 is OK. > > Patch #2 is OK. > > Patch #3 is OK according to Wang Rui's reply. > > Patch #4 has no big problems, the current testcases passed, > I am not sure whether it has problem, I can fix it if there > is a real problem, maybe it needs to update the testcase first. > > patch #5 is OK, hope you can replace "usable" with "enable" in > the patch subject and commit message when applying. OK, Applied to loongarch-next with some small modifications, please make sure everything works well. Huacai > > Thanks, > Tiezhu > >
On 2026/4/22 下午4:15, Huacai Chen wrote: > On Tue, Apr 21, 2026 at 9:24 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote: ... > OK, Applied to loongarch-next with some small modifications, please > make sure everything works well. I tested the loongarch-next tree, all the related testcases passed: sudo ./test_progs -a tracing_struct/struct_args sudo ./test_progs -a tracing_struct/union_args sudo ./test_progs -a tracing_struct/struct_many_args sudo ./test_progs -a fentry_test/fentry_many_args sudo ./test_progs -a fexit_test/fexit_many_args sudo ./test_progs -t verifier_load_acquire sudo ./test_progs -t verifier_store_release sudo ./test_progs -t verifier_precision/bpf_load_acquire sudo ./test_progs -t verifier_precision/bpf_store_release sudo ./test_progs -t compute_live_registers/atomic_load_acq_store_rel Thanks, Tiezhu
On 4/21/26 21:25, Tiezhu Yang wrote: > On 4/21/26 20:38, Huacai Chen wrote: >> Hi, Tiezhu, >> >> Maybe we need V4? If so, please submit as soon as possible. > > For now, TBH, I do not want to do that. > > Patch #1 is OK. > > Patch #2 is OK. > > Patch #3 is OK according to Wang Rui's reply. > > Patch #4 has no big problems, the current testcases passed, > I am not sure whether it has problem, I can fix it if there > is a real problem, maybe it needs to update the testcase first. > > patch #5 is OK, hope you can replace "usable" with "enable" in > the patch subject and commit message when applying. For patch #5, correct myself, enable is verb, usable is adjective, so just keep it as is, or modify the log as following: --- selftests/bpf: Enable CAN_USE_LOAD_ACQ_STORE_REL for LoongArch In order to do the following load-acquire and store-release tests on LoongArch: sudo ./test_progs -t verifier_load_acquire sudo ./test_progs -t verifier_store_release sudo ./test_progs -t verifier_precision/bpf_load_acquire sudo ./test_progs -t verifier_precision/bpf_store_release sudo ./test_progs -t compute_live_registers/atomic_load_acq_store_rel it needs to enable CAN_USE_LOAD_ACQ_STORE_REL for LoongArch. --- For short, replace "make ... usable" with "enable ...". Thanks, Tiezhu
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