.../net/ethernet/mellanox/mlx5/core/lib/clock.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-)
In mlx5_pps_event(), several critical issues were identified:
1. The 'pin' index from the hardware event was used without bounds
checking to index 'pin_config' and 'pps_info->start'. Check against
MAX_PIN_NUM to prevent out-of-bounds access.
2. 'ptp_event' was not zero-initialized, potentially leaking stack
memory through the union.
3. A NULL 'pin_config' could be dereferenced if initialization failed.
4. 'clock->ptp' could be NULL if ptp_clock_register() failed.
Fixes: 7c39afb394c7 ("net/mlx5: PTP code migration to driver core section")
Suggested-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Prathamesh Deshpande <prathameshdeshpande7@gmail.com>
---
v4:
- Validate pin index against MAX_PIN_NUM instead of n_pins [Carolina].
v3:
- Fix union corruption by using a local timestamp variable [Sashiko].
- Validate pin index against n_pins with WARN_ON_ONCE [Carolina].
- Remove redundant pin < 0 check and cleanup TODO comment.
v2:
- Zero-initialize ptp_event to prevent stack information leak [Sashiko].
- Add bounds check for hardware pin index to prevent OOB access [Sashiko].
- Add NULL guard for pin_config to handle initialization failures [Sashiko].
- Add NULL check for clock->ptp as originally intended.
.../net/ethernet/mellanox/mlx5/core/lib/clock.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
index bd4e042077af..ff03dfa12a67 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
@@ -1164,16 +1164,22 @@ static int mlx5_pps_event(struct notifier_block *nb,
pps_nb);
struct mlx5_core_dev *mdev = clock_state->mdev;
struct mlx5_clock *clock = mdev->clock;
- struct ptp_clock_event ptp_event;
+ struct ptp_clock_event ptp_event = {};
struct mlx5_eqe *eqe = data;
int pin = eqe->data.pps.pin;
unsigned long flags;
u64 ns;
+ if (!clock->ptp_info.pin_config)
+ return NOTIFY_OK;
+
+ if (WARN_ON_ONCE(pin >= MAX_PIN_NUM))
+ return NOTIFY_OK;
+
switch (clock->ptp_info.pin_config[pin].func) {
case PTP_PF_EXTTS:
ptp_event.index = pin;
- ptp_event.timestamp = mlx5_real_time_mode(mdev) ?
+ ns = mlx5_real_time_mode(mdev) ?
mlx5_real_time_cyc2time(clock,
be64_to_cpu(eqe->data.pps.time_stamp)) :
mlx5_timecounter_cyc2time(clock,
@@ -1181,12 +1187,13 @@ static int mlx5_pps_event(struct notifier_block *nb,
if (clock->pps_info.enabled) {
ptp_event.type = PTP_CLOCK_PPSUSR;
ptp_event.pps_times.ts_real =
- ns_to_timespec64(ptp_event.timestamp);
+ ns_to_timespec64(ns);
} else {
ptp_event.type = PTP_CLOCK_EXTTS;
+ ptp_event.timestamp = ns;
}
- /* TODOL clock->ptp can be NULL if ptp_clock_register fails */
- ptp_clock_event(clock->ptp, &ptp_event);
+ if (clock->ptp)
+ ptp_clock_event(clock->ptp, &ptp_event);
break;
case PTP_PF_PEROUT:
if (clock->shared) {
--
2.43.0
On Sun, Apr 12, 2026 at 01:04:10AM +0100, Prathamesh Deshpande wrote: > In mlx5_pps_event(), several critical issues were identified: > > 1. The 'pin' index from the hardware event was used without bounds > checking to index 'pin_config' and 'pps_info->start'. Check against > MAX_PIN_NUM to prevent out-of-bounds access. You were told more than once that this is impossible. <...> > + if (WARN_ON_ONCE(pin >= MAX_PIN_NUM)) > + return NOTIFY_OK; Let's not add useless checks in fast path. Thanks
On Mon, Apr 13, 2026 at 05:46:10PM +0300, Leon Romanovsky wrote: > On Sun, Apr 12, 2026 at 01:04:10AM +0100, Prathamesh Deshpande wrote: > > In mlx5_pps_event(), several critical issues were identified: > > > > 1. The 'pin' index from the hardware event was used without bounds > > checking to index 'pin_config' and 'pps_info->start'. Check against > > MAX_PIN_NUM to prevent out-of-bounds access. > > You were told more than once that this is impossible. > > <...> > > > + if (WARN_ON_ONCE(pin >= MAX_PIN_NUM)) > > + return NOTIFY_OK; > > Let's not add useless checks in fast path. Hi Leon, Thanks for the feedback. I've addressed this in v5 by dropping the redundant pin bounds and pin_config checks to keep the fast path clean, focusing strictly on the stack leak and NULL clock guard fixes. Thanks, Prathamesh
On 12/04/2026 3:04, Prathamesh Deshpande wrote:
> In mlx5_pps_event(), several critical issues were identified:
>
> 1. The 'pin' index from the hardware event was used without bounds
> checking to index 'pin_config' and 'pps_info->start'. Check against
> MAX_PIN_NUM to prevent out-of-bounds access.
> 2. 'ptp_event' was not zero-initialized, potentially leaking stack
> memory through the union.
> 3. A NULL 'pin_config' could be dereferenced if initialization failed.
> 4. 'clock->ptp' could be NULL if ptp_clock_register() failed.
>
> Fixes: 7c39afb394c7 ("net/mlx5: PTP code migration to driver core section")
> Suggested-by: Carolina Jubran <cjubran@nvidia.com>
> Signed-off-by: Prathamesh Deshpande <prathameshdeshpande7@gmail.com>
Reviewed-by: Carolina Jubran <cjubran@nvidia.com>
© 2016 - 2026 Red Hat, Inc.