Winbond chips W35N02JW and W35N04JW differ slightly from W35N01JW. As
they have more blocks, they require a couple more bits to fully address
the whole device. These address bits have been stuffed at the end of the
command cycles, which is non standard, and this is something I didn't
catch in the first place.

Stuffing these address bits there implies the creation of a new spi-mem
command template.

While testing, I realized one of my former patches in the Cadence
controller was totally wrong, so it needs to be reverted.

Mark, if it is not too late, you may want to pull in the first 2
patches, and I will apply the SPI NAND patches in a fixes PR after -rc1
is out.

Sorry for the mess :-)

Thanks,
Miquèl

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
Miquel Raynal (5):
      spi: cadence-qspi: Revert the filtering of certain opcodes in ODTR
      spi: spi-mem: Add a packed command operation
      mtd: spinand: Add support for packed read data ODTR commands
      mtd: spinand: winbond: Set the packed page read flag to W35N02/04JW
      mtd: spinand: winbond: Fix ODTR write VCR on W35NxxJW

 drivers/mtd/nand/spi/core.c       | 24 +++++++++++++++++++++---
 drivers/mtd/nand/spi/winbond.c    |  6 +++---
 drivers/spi/spi-cadence-quadspi.c |  4 ----
 include/linux/mtd/spinand.h       |  7 +++++++
 include/linux/spi/spi-mem.h       |  8 ++++++++
 5 files changed, 39 insertions(+), 10 deletions(-)
---
base-commit: a2e786cb711f88509c39b82d8e5a7e52b169b1a6
change-id: 20260410-winbond-6-19-rc1-oddr-7a87b98c452c

Best regards,
-- 
Miquel Raynal <miquel.raynal@bootlin.com>

On Fri, 10 Apr 2026 19:41:00 +0200, Miquel Raynal wrote:
> mtd/spi: Fix Winbond W35N02JW / W35N04JW support
> 
> Winbond chips W35N02JW and W35N04JW differ slightly from W35N01JW. As
> they have more blocks, they require a couple more bits to fully address
> the whole device. These address bits have been stuffed at the end of the
> command cycles, which is non standard, and this is something I didn't
> catch in the first place.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-7.1

Thanks!

[1/5] spi: cadence-qspi: Revert the filtering of certain opcodes in ODTR
      https://git.kernel.org/broonie/spi/c/5e75c1d4d386
[2/5] spi: spi-mem: Add a packed command operation
      https://git.kernel.org/broonie/spi/c/f79ee9e4b232

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>> Winbond chips W35N02JW and W35N04JW differ slightly from W35N01JW. As
>> they have more blocks, they require a couple more bits to fully address
>> the whole device. These address bits have been stuffed at the end of the
>> command cycles, which is non standard, and this is something I didn't
>> catch in the first place.
>> 
>> [...]
>
> Applied to
>
>    https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-7.1
>
> Thanks!
>
> [1/5] spi: cadence-qspi: Revert the filtering of certain opcodes in ODTR
>       https://git.kernel.org/broonie/spi/c/5e75c1d4d386
> [2/5] spi: spi-mem: Add a packed command operation
>       https://git.kernel.org/broonie/spi/c/f79ee9e4b232

The 3 other patches have been queued for the next mtd/fixes PR.

Thanks a lot Mark for the responsiveness.

Bes regards,
Miquèl