Introduce Top Level Mode Multiplexer dt-binding and driver for upcoming
Qualcomm Hawi SoC.

Changes in v2: https://lore.kernel.org/lkml/20260401-hawi-pinctrl-v1-0-4718da24e531@oss.qualcomm.com/#t
  - Addressed some of comment raised by Bjorn on following
   	o Grouping i2s0_* to just i2s0 and same goes for i2s1_* to i2s1.
	o Group the function such as qup3_se0_l0 and qup3_se0_l1 and qup3_se0_l2
          and qup3_se0_l3 together with qup3_se0_01 and qup3_se0_23 and
	  do the same of the other similar instances.
        o uim0_* to uim and uim1_* to uim1 as they are non-overlapping.
	o Grouping change for nav_gpios and qlink.
	o cci_i2c_sda and cci_i2c_scl to its respective serial engine
	  numbering replacing with cci_i2c0, cci_i2c1 ... etc.,

---
Mukesh Ojha (2):
      dt-bindings: pinctrl: qcom: Describe Hawi TLMM block
      pinctrl: qcom: Add Hawi pinctrl driver

 .../bindings/pinctrl/qcom,hawi-tlmm.yaml           |  120 ++
 drivers/pinctrl/qcom/Kconfig.msm                   |   10 +
 drivers/pinctrl/qcom/Makefile                      |    1 +
 drivers/pinctrl/qcom/pinctrl-hawi.c                | 1610 ++++++++++++++++++++
 4 files changed, 1741 insertions(+)
---
base-commit: f3e6330d7fe42b204af05a2dbc68b379e0ad179e
change-id: 20260408-hawi-pinctrl-a58d36ec2fc2

Best regards,
-- 
-Mukesh Ojha

On Wed, Apr 8, 2026 at 4:16 PM Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> wrote:

> Introduce Top Level Mode Multiplexer dt-binding and driver for upcoming
> Qualcomm Hawi SoC.

All was reviewed quickly so patches applied for kernel v7.1,
because why not.

Yours,
Linus Walleij

On 4/9/2026 1:53 AM, Linus Walleij wrote:
> On Wed, Apr 8, 2026 at 4:16 PM Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> wrote:
> 
>> Introduce Top Level Mode Multiplexer dt-binding and driver for upcoming
>> Qualcomm Hawi SoC.
> 
> All was reviewed quickly so patches applied for kernel v7.1,
> because why not.

Thank you Linus. 

---Trilok Soni