snd_akm4xxx_init() clears the register and volume caches before
dispatching by codec type. The AK5365 case then returns immediately,
leaving the software cache at zero instead of the documented AK5365
reset defaults.

The AK5365 capture volume controls read from volumes[] and the proc
register dump reads from images[], so the initial capture volume state
and proc output are wrong until a control write happens.

Seed the AK5365 cache with its documented reset defaults instead of
adding a guessed init sequence. The datasheet documents the reset
values and states that MCLK/LRCK changes do not require a PDN/PWN
reset because the chip has a built-in reset-free circuit.

Signed-off-by: Cássio Gabriel <cassiogabrielcontato@gmail.com>
---
 sound/i2c/other/ak4xxx-adda.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/sound/i2c/other/ak4xxx-adda.c b/sound/i2c/other/ak4xxx-adda.c
index bdeb3cef3640..9dd36b82a6ac 100644
--- a/sound/i2c/other/ak4xxx-adda.c
+++ b/sound/i2c/other/ak4xxx-adda.c
@@ -281,6 +281,9 @@ void snd_akm4xxx_init(struct snd_akm4xxx *ak)
 		0x07, 0x00, /* 7: ROUT muted */
 		0xff, 0xff
 	};
+	static const unsigned char ak5365_defaults[] = {
+		0x01, 0x00, 0x00, 0x2b, 0x7f, 0x7f, 0x28, 0x89,
+	};
 
 	int chip;
 	const unsigned char *ptr, *inits;
@@ -327,10 +330,12 @@ void snd_akm4xxx_init(struct snd_akm4xxx *ak)
 		ak->total_regs = 0x05;
 		break;
 	case SND_AK5365:
-		/* FIXME: any init sequence? */
 		ak->num_chips = 1;
 		ak->name = "ak5365";
 		ak->total_regs = 0x08;
+		memcpy(ak->images, ak5365_defaults, sizeof(ak5365_defaults));
+		snd_akm4xxx_set_vol(ak, 0, 0x04, 127);
+		snd_akm4xxx_set_vol(ak, 0, 0x05, 127);
 		return;
 	case SND_AK4620:
 		inits = inits_ak4620;

---
base-commit: d3bc0384ef6f4b23dea8c753496ebf027237112c
change-id: 20260408-ak5365-cache-defaults-b6d5ad335e79

Best regards,
--  
Cássio Gabriel <cassiogabrielcontato@gmail.com>

On Wed, 08 Apr 2026 17:17:37 +0200,
Cássio Gabriel wrote:
> 
> snd_akm4xxx_init() clears the register and volume caches before
> dispatching by codec type. The AK5365 case then returns immediately,
> leaving the software cache at zero instead of the documented AK5365
> reset defaults.
> 
> The AK5365 capture volume controls read from volumes[] and the proc
> register dump reads from images[], so the initial capture volume state
> and proc output are wrong until a control write happens.
> 
> Seed the AK5365 cache with its documented reset defaults instead of
> adding a guessed init sequence. The datasheet documents the reset
> values and states that MCLK/LRCK changes do not require a PDN/PWN
> reset because the chip has a built-in reset-free circuit.
> 
> Signed-off-by: Cássio Gabriel <cassiogabrielcontato@gmail.com>

Applied to for-next branch.  Thanks.


Takashi