Also switch to enable vIOMMU by default, and provide kernel boot option to
disable the feature.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/amd_iommu_types.h | 3 +++
drivers/iommu/amd/init.c | 14 +++++++++++++-
drivers/iommu/amd/viommu.c | 16 ++++++++++++++++
4 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 38694ebdb083..2b057ab77ce8 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -25,6 +25,7 @@ void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
+bool iommu_feature_enable_and_check(struct amd_iommu *iommu, u8 bit);
void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
gfp_t gfp, size_t size);
u8 __iomem * __init iommu_map_mmio_space(u64 address, u64 end);
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index ff72023fa512..4667efcfb8e9 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -204,9 +204,12 @@
#define CONTROL_EPH_EN 45
#define CONTROL_PPR_AUTO_RSP_AON 48
#define CONTROL_XT_EN 50
+#define CONTROL_VCMD_EN 52
+#define CONTROL_VIOMMU_EN 53
#define CONTROL_INTCAPXT_EN 51
#define CONTROL_GCR3TRPMODE 58
#define CONTROL_IRTCACHEDIS 59
+#define CONTROL_GSTBUFFERTRPMODE 60
#define CONTROL_SNPAVIC_EN 61
#define CTRL_INV_TO_MASK 7
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 0018ae804ab4..63271f4305de 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -195,7 +195,7 @@ bool amdr_ivrs_remap_support __read_mostly;
bool amd_iommu_force_isolation __read_mostly;
/* VIOMMU enabling flag */
-bool amd_iommu_viommu;
+bool amd_iommu_viommu = true;
unsigned long amd_iommu_pgsize_bitmap __ro_after_init = AMD_IOMMU_PGSIZES;
@@ -436,6 +436,16 @@ void iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
iommu_feature_set(iommu, 1ULL, 1ULL, bit);
}
+bool iommu_feature_enable_and_check(struct amd_iommu *iommu, u8 bit)
+{
+ u64 ctrl;
+
+ iommu_feature_enable(iommu, bit);
+
+ ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET);
+ return (ctrl & (1ULL << bit));
+}
+
static void iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
{
iommu_feature_set(iommu, 0ULL, 1ULL, bit);
@@ -3702,6 +3712,8 @@ static int __init parse_amd_iommu_options(char *str)
} else if (strncmp(str, "v2_pgsizes_only", 15) == 0) {
pr_info("Restricting V1 page-sizes to 4KiB/2MiB/1GiB");
amd_iommu_pgsize_bitmap = AMD_IOMMU_PGSIZES_V2;
+ } else if (strncmp(str, "viommu_disable", 14) == 0) {
+ amd_iommu_viommu = false;
} else {
pr_notice("Unknown option - '%s'\n", str);
}
diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c
index 4626134893d6..5c744de729d5 100644
--- a/drivers/iommu/amd/viommu.c
+++ b/drivers/iommu/amd/viommu.c
@@ -45,6 +45,18 @@
LIST_HEAD(viommu_devid_map);
+static int viommu_enable(struct amd_iommu *iommu)
+{
+ /* The GstBufferTRPMode feature is checked by set and test */
+ if (!iommu_feature_enable_and_check(iommu, CONTROL_GSTBUFFERTRPMODE))
+ return -EINVAL;
+
+ iommu_feature_enable(iommu, CONTROL_VCMD_EN);
+ iommu_feature_enable(iommu, CONTROL_VIOMMU_EN);
+
+ return 0;
+}
+
static int viommu_init_pci_vsc(struct amd_iommu *iommu)
{
iommu->vsc_offset = pci_find_capability(iommu->dev, PCI_CAP_ID_VNDR);
@@ -298,6 +310,10 @@ int __init amd_viommu_init(struct amd_iommu *iommu)
set_iommu_dte(iommu);
+ ret = viommu_enable(iommu);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.34.1