arch/arm64/boot/dts/qcom/msm8996.dtsi | 41 +++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
Add the BLSP2 SPI4 controller node together with its default and sleep
pinctrl states.
Signed-off-by: Christopher Obbard <christopher.obbard@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 41 +++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 9d4ce47578fb4..7f920664a9d3b 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1623,6 +1623,30 @@ blsp2_i2c1_sleep: blsp2-i2c1-sleep-state {
bias-disable;
};
+ blsp2_spi4_default: blsp2-spi4-default-state {
+ spi-pins {
+ pins = "gpio58", "gpio59", "gpio61";
+ function = "blsp_spi11";
+ drive-strength = <12>;
+ bias-disable;
+ };
+
+ cs-pins {
+ pins = "gpio60";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+ };
+
+ blsp2_spi4_sleep: blsp2-spi4-sleep-state {
+ pins = "gpio58", "gpio59", "gpio60", "gpio61";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
blsp2_i2c5_default: blsp2-i2c5-state {
pins = "gpio60", "gpio61";
function = "blsp_i2c11";
@@ -3417,6 +3441,23 @@ blsp2_i2c3: i2c@75b7000 {
status = "disabled";
};
+ blsp2_spi4: spi@75b9000 {
+ compatible = "qcom,spi-qup-v2.2.1";
+ reg = <0x075b9000 0x600>,
+ <0x07584000 0x2b000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP2_AHB_CLK>;
+ clock-names = "core", "iface";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&blsp2_spi4_default>;
+ pinctrl-1 = <&blsp2_spi4_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp2_i2c5: i2c@75b9000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x75b9000 0x1000>;
---
base-commit: 54f966f63b379d0c62bb044b7903319776443a4a
change-id: 20260329-wip-obbardc-msm8996-blsp2_spi4-7892454c504c
Best regards,
--
Christopher Obbard <christopher.obbard@linaro.org>
On Sun, Mar 29, 2026 at 02:19:15PM +0100, Christopher Obbard wrote:
> Add the BLSP2 SPI4 controller node together with its default and sleep
> pinctrl states.
>
> Signed-off-by: Christopher Obbard <christopher.obbard@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 41 +++++++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> @@ -3417,6 +3441,23 @@ blsp2_i2c3: i2c@75b7000 {
> status = "disabled";
> };
>
> + blsp2_spi4: spi@75b9000 {
This should be coming after i2c@75b9000 (which needs to be renamed to
i2c4, btw)
> + compatible = "qcom,spi-qup-v2.2.1";
> + reg = <0x075b9000 0x600>,
> + <0x07584000 0x2b000>;
This wasn't tested against the bindings.
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>,
> + <&gcc GCC_BLSP2_AHB_CLK>;
> + clock-names = "core", "iface";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&blsp2_spi4_default>;
> + pinctrl-1 = <&blsp2_spi4_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> blsp2_i2c5: i2c@75b9000 {
> compatible = "qcom,i2c-qup-v2.2.1";
> reg = <0x75b9000 0x1000>;
>
> ---
> base-commit: 54f966f63b379d0c62bb044b7903319776443a4a
> change-id: 20260329-wip-obbardc-msm8996-blsp2_spi4-7892454c504c
>
> Best regards,
> --
> Christopher Obbard <christopher.obbard@linaro.org>
>
--
With best wishes
Dmitry
Hi Dmitry,
Thanks for the review.
On Sun, 29 Mar 2026 at 17:03, Dmitry Baryshkov
<dmitry.baryshkov@oss.qualcomm.com> wrote:
>
> On Sun, Mar 29, 2026 at 02:19:15PM +0100, Christopher Obbard wrote:
> > Add the BLSP2 SPI4 controller node together with its default and sleep
> > pinctrl states.
> >
> > Signed-off-by: Christopher Obbard <christopher.obbard@linaro.org>
> > ---
> > arch/arm64/boot/dts/qcom/msm8996.dtsi | 41 +++++++++++++++++++++++++++++++++++
> > 1 file changed, 41 insertions(+)
> >
> > @@ -3417,6 +3441,23 @@ blsp2_i2c3: i2c@75b7000 {
> > status = "disabled";
> > };
> >
> > + blsp2_spi4: spi@75b9000 {
>
> This should be coming after i2c@75b9000 (which needs to be renamed to
> i2c4, btw)
I will move the node in the next revision.
I will also add a separate commit to rename i2c@75b9000 from
blsp2_i2c5 to blsp2_i2c4. I assume the pinctrls also need to be
renamed to i2c4?
Also, do you know of any other nodes which need to be renamed while I am there?
> > + compatible = "qcom,spi-qup-v2.2.1";
> > + reg = <0x075b9000 0x600>,
> > + <0x07584000 0x2b000>;
>
> This wasn't tested against the bindings.
Oops - I will solve this in the next revision.
Cheers!
Chris
On Sun, Mar 29, 2026 at 05:35:23PM +0100, Christopher Obbard wrote:
> Hi Dmitry,
>
> Thanks for the review.
>
> On Sun, 29 Mar 2026 at 17:03, Dmitry Baryshkov
> <dmitry.baryshkov@oss.qualcomm.com> wrote:
> >
> > On Sun, Mar 29, 2026 at 02:19:15PM +0100, Christopher Obbard wrote:
> > > Add the BLSP2 SPI4 controller node together with its default and sleep
> > > pinctrl states.
> > >
> > > Signed-off-by: Christopher Obbard <christopher.obbard@linaro.org>
> > > ---
> > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 41 +++++++++++++++++++++++++++++++++++
> > > 1 file changed, 41 insertions(+)
> > >
> > > @@ -3417,6 +3441,23 @@ blsp2_i2c3: i2c@75b7000 {
> > > status = "disabled";
> > > };
> > >
> > > + blsp2_spi4: spi@75b9000 {
> >
> > This should be coming after i2c@75b9000 (which needs to be renamed to
> > i2c4, btw)
>
> I will move the node in the next revision.
> I will also add a separate commit to rename i2c@75b9000 from
> blsp2_i2c5 to blsp2_i2c4. I assume the pinctrls also need to be
> renamed to i2c4?
> Also, do you know of any other nodes which need to be renamed while I am there?
Hmm, after checking. For whatever reason, the nodes are off-by-one.
Sorry, I didn't notice it from the beginning. So, instead this should be
blsp2_spi5.
>
>
> > > + compatible = "qcom,spi-qup-v2.2.1";
> > > + reg = <0x075b9000 0x600>,
> > > + <0x07584000 0x2b000>;
> >
> > This wasn't tested against the bindings.
>
> Oops - I will solve this in the next revision.
>
>
> Cheers!
>
> Chris
--
With best wishes
Dmitry
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