[PATCH v8 0/3] iio: adc: ad4080: add support for AD4880 dual-channel ADC

Antoniu Miclaus posted 3 patches 4 days, 14 hours ago
.../bindings/iio/adc/adi,ad4080.yaml          |  53 +++-
drivers/iio/adc/ad4080.c                      | 251 ++++++++++++++----
drivers/iio/industrialio-backend.c            |  53 ++--
include/linux/iio/backend.h                   |   1 +
4 files changed, 282 insertions(+), 76 deletions(-)
[PATCH v8 0/3] iio: adc: ad4080: add support for AD4880 dual-channel ADC
Posted by Antoniu Miclaus 4 days, 14 hours ago
Add support for the AD4880, a dual-channel 20-bit 40MSPS SAR ADC with
integrated fully differential amplifiers (FDA).

Architecture notes:

The AD4880 is modeled as a single IIO device rather than two independent
devices because the channels share power supplies, a voltage reference,
the CNV conversion clock, and a single interleaved data output stream.
Splitting them into separate IIO devices would make synchronized
dual-channel capture impossible from userspace.

An MFD approach does not apply here either - the channels are not
functionally distinct sub-devices but identical ADC paths sharing a
common data interface.

Each channel has fully independent configuration registers accessible
through separate SPI chip selects, so per-channel regmaps are used with
no locking between them. The data path has no software involvement at
runtime: the CNV clock triggers simultaneous conversions and the device
outputs an interleaved bitstream captured directly by the IIO backend
(FPGA). spi_new_ancillary_device() handles the configuration path;
the IIO backend handles the data path.

The debugfs_reg_access callback is not exposed for the dual-channel
variant since the IIO framework provides a single (reg, val) interface
with no channel parameter, and exposing only one channel would be
misleading.

The AD4880 is a fairly unique part - having separate SPI config
interfaces per channel with a shared interleaved data output is not
a common pattern.

Changes in v8:
  - Drop fwnode_handle cleanup patch (now in jic23/testing)
  - Clarify backend buffer comment to describe FPGA architecture
    (two axi_ad408x IP instances with a packer block)
  - Make filter_type a per-channel array instead of a single variable
  - Restore debugfs_reg_access for AD4880 (uses channel 0 regmap),
    based on sashiko's review

Antoniu Miclaus (3):
  iio: backend: add devm_iio_backend_get_by_index()
  dt-bindings: iio: adc: ad4080: add AD4880 support
  iio: adc: ad4080: add support for AD4880 dual-channel ADC

 .../bindings/iio/adc/adi,ad4080.yaml          |  53 +++-
 drivers/iio/adc/ad4080.c                      | 251 ++++++++++++++----
 drivers/iio/industrialio-backend.c            |  53 ++--
 include/linux/iio/backend.h                   |   1 +
 4 files changed, 282 insertions(+), 76 deletions(-)

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2.43.0