From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Add support for the xSPI controller found on the Renesas RZ/T2H
(R9A09G077) SoC.

The xSPI IP on RZ/T2H is closely related to the RZ/G3E variant, with
minor differences in some configuration register bits. As these
differences are not currently exercised by the driver, reuse the
existing implementation and regmap configuration.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2:
- Added xspi_info_r9a09g077 for RZ/T2H with type XSPI_RZ_T2H instead
  of reusing xspi_info_r9a09g047 with type XSPI_RZ_G3E, to allow for
  better differentiation in the future if needed.
---
 drivers/memory/renesas-rpc-if.c | 11 ++++++++++-
 include/memory/renesas-rpc-if.h |  1 +
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/memory/renesas-rpc-if.c b/drivers/memory/renesas-rpc-if.c
index 3755956ae906..347650698424 100644
--- a/drivers/memory/renesas-rpc-if.c
+++ b/drivers/memory/renesas-rpc-if.c
@@ -211,7 +211,9 @@ int rpcif_sw_init(struct rpcif *rpcif, struct device *dev)
 	rpcif->dev = dev;
 	rpcif->dirmap = rpc->dirmap;
 	rpcif->size = rpc->size;
-	rpcif->xspi = rpc->info->type == XSPI_RZ_G3E;
+	rpcif->xspi = (rpc->info->type == XSPI_RZ_G3E ||
+		       rpc->info->type == XSPI_RZ_T2H);
+
 	return 0;
 }
 EXPORT_SYMBOL(rpcif_sw_init);
@@ -1142,9 +1144,16 @@ static const struct rpcif_info xspi_info_r9a09g047 = {
 	.type = XSPI_RZ_G3E,
 };
 
+static const struct rpcif_info xspi_info_r9a09g077 = {
+	.regmap_config = &xspi_regmap_config,
+	.impl = &xspi_impl,
+	.type = XSPI_RZ_T2H,
+};
+
 static const struct of_device_id rpcif_of_match[] = {
 	{ .compatible = "renesas,r8a7796-rpc-if", .data = &rpcif_info_r8a7796 },
 	{ .compatible = "renesas,r9a09g047-xspi", .data = &xspi_info_r9a09g047 },
+	{ .compatible = "renesas,r9a09g077-xspi", .data = &xspi_info_r9a09g077 },
 	{ .compatible = "renesas,rcar-gen3-rpc-if", .data = &rpcif_info_gen3 },
 	{ .compatible = "renesas,rcar-gen4-rpc-if", .data = &rpcif_info_gen4 },
 	{ .compatible = "renesas,rzg2l-rpc-if", .data = &rpcif_info_rz_g2l },
diff --git a/include/memory/renesas-rpc-if.h b/include/memory/renesas-rpc-if.h
index 53663c4e5ae3..39810d2db095 100644
--- a/include/memory/renesas-rpc-if.h
+++ b/include/memory/renesas-rpc-if.h
@@ -62,6 +62,7 @@ enum rpcif_type {
 	RPCIF_RCAR_GEN4,
 	RPCIF_RZ_G2L,
 	XSPI_RZ_G3E,
+	XSPI_RZ_T2H,
 };
 
 struct rpcif {
-- 
2.53.0

On 27/03/2026 18:42, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add support for the xSPI controller found on the Renesas RZ/T2H
> (R9A09G077) SoC.
> 
> The xSPI IP on RZ/T2H is closely related to the RZ/G3E variant, with
> minor differences in some configuration register bits. As these
> differences are not currently exercised by the driver, reuse the
> existing implementation and regmap configuration.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v1->v2:
> - Added xspi_info_r9a09g077 for RZ/T2H with type XSPI_RZ_T2H instead
>   of reusing xspi_info_r9a09g047 with type XSPI_RZ_G3E, to allow for
>   better differentiation in the future if needed.

I see you tried to improve the description, but I have the same
concerns. You added now bunch of dead code to mimic lack of
compatibility, but it does not change the fact the code is 100%
compatible in the meaning of DT.

Let me repeat the question from v1:

"Eventually provide extensive arguments in terms of how DT understands
compatibility."

And if you answer like Geert did last time: "differences are not handled
yet" or "new features are not yet implemented" then you will get the
same answer.

Best regards,
Krzysztof