From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add device tree binding support for the xSPI Interface on Renesas
RZ/T2H and RZ/N2H SoCs. The xSPI IP on these SoCs is closely related
to that found on the RZ/G3E SoC with some register bit differences
in the configuration registers.
The RZ/T2H variant has a reduced clock configuration, requiring only
the AHB and SPI clocks (without the AXI and spix2 clocks). It also
requires only the hardware reset (hresetn), without the AXI reset
(aresetn).
The RZ/N2H variant is compatible with RZ/T2H and uses the same clock
and reset configuration.
Update the binding schema to accommodate these differences using
conditional constraints based on the compatible string, while
maintaining backward compatibility with existing RZ/G3E and RZ/V2H(P)
implementations.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
v1->v2:
- Add RB tag from Rob for the dt-bindings patch.
---
.../renesas,rzg3e-xspi.yaml | 60 +++++++++++++++----
1 file changed, 49 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml
index 7a84f5bb7284..bf50d90051c9 100644
--- a/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml
@@ -24,7 +24,9 @@ allOf:
properties:
compatible:
oneOf:
- - const: renesas,r9a09g047-xspi # RZ/G3E
+ - enum:
+ - renesas,r9a09g047-xspi # RZ/G3E
+ - renesas,r9a09g077-xspi # RZ/T2H
- items:
- enum:
@@ -32,6 +34,10 @@ properties:
- renesas,r9a09g057-xspi # RZ/V2H(P)
- const: renesas,r9a09g047-xspi
+ - items:
+ - const: renesas,r9a09g087-xspi # RZ/N2H
+ - const: renesas,r9a09g077-xspi
+
reg:
items:
- description: xSPI registers
@@ -53,28 +59,38 @@ properties:
- const: err_pulse
clocks:
- items:
- - description: AHB clock
- - description: AXI clock
- - description: SPI clock
- - description: Double speed SPI clock
+ oneOf:
+ - items:
+ - description: AHB clock
+ - description: AXI clock
+ - description: SPI clock
+ - description: Double speed SPI clock
+ - items:
+ - description: AHB clock
+ - description: SPI clock
clock-names:
- items:
- - const: ahb
- - const: axi
- - const: spi
- - const: spix2
+ oneOf:
+ - items:
+ - const: ahb
+ - const: axi
+ - const: spi
+ - const: spix2
+ - items:
+ - const: ahb
+ - const: spi
power-domains:
maxItems: 1
resets:
+ minItems: 1
items:
- description: Hardware reset
- description: AXI reset
reset-names:
+ minItems: 1
items:
- const: hresetn
- const: aresetn
@@ -109,6 +125,28 @@ required:
- '#address-cells'
- '#size-cells'
+if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a09g077-xspi
+then:
+ properties:
+ clocks:
+ maxItems: 2
+ clock-names:
+ maxItems: 2
+else:
+ properties:
+ clocks:
+ minItems: 4
+ clock-names:
+ minItems: 4
+ resets:
+ minItems: 2
+ resets-names:
+ minItems: 2
+
unevaluatedProperties: false
examples:
--
2.53.0