[PATCH v4 0/2] arm64: dts: qcom: add IMEM and PIL regions for glymur

Ananthu C V posted 2 patches 6 days, 5 hours ago
Documentation/devicetree/bindings/sram/sram.yaml |  1 +
arch/arm64/boot/dts/qcom/glymur.dtsi             | 16 ++++++++++++++++
2 files changed, 17 insertions(+)
[PATCH v4 0/2] arm64: dts: qcom: add IMEM and PIL regions for glymur
Posted by Ananthu C V 6 days, 5 hours ago
This series adds dt binding and node for IMEM on glymur.

changes in v4:
 - picked up acked-by for the dt-binding
 - added dt node for imem on glymur
 - rebased the commits
 - link to v3: https://lore.kernel.org/all/20260129071435.2624252-1-ananthu.cv@oss.qualcomm.com/

changes in v3:
 - moved dt-binding to sram.yaml for mmio-sram fallback
 - link to v2: https://lore.kernel.org/all/20260123101501.2836551-2-ananthu.cv@oss.qualcomm.com/

changes in v2:
 - alphabetically sorted the placement of glymur in the list
 - link to v1: https://lore.kernel.org/all/20260122093319.2124906-1-ananthu.cv@oss.qualcomm.com/

Signed-off-by: Ananthu C V <ananthu.cv@oss.qualcomm.com>
---
Ananthu C V (2):
      dt-bindings: sram: document glymur as compatible
      arch: arm64: boot: dts: qcom: add IMEM and PIL regions for glymur

 Documentation/devicetree/bindings/sram/sram.yaml |  1 +
 arch/arm64/boot/dts/qcom/glymur.dtsi             | 16 ++++++++++++++++
 2 files changed, 17 insertions(+)
---
base-commit: 6b346ee225a1747218759fc4846aacf203e1eb35
change-id: 20260327-glymur-imem-bfcf2288e5f8

Best regards,
--  
Ananthu C V <ananthu.cv@oss.qualcomm.com>