Qualcomm CSI2 PHYs support a mode where two sensors may be attached to the
one CSIPHY.
When we have one endpoint we may have
- DPHY 1, 2 or 4 data lanes + 1 clock lane
- CPHY 3 wire data lane
When we have two endpoints this indicates the special fixed combo-mode.
- DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane combination.
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
.../bindings/media/qcom,x1e80100-camss.yaml | 69 ++++++++++++++++++++--
1 file changed, 65 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
index c17b9757b2c86..f44138f522bba 100644
--- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml
@@ -148,7 +148,8 @@ properties:
$ref: /schemas/graph.yaml#/properties/ports
description:
- CSI input ports.
+ CSI input ports. Supports either standard single sensor mode or
+ Qualcomm's combo mode with one sensor in 2x1 + 1x1 data-lane, clock-lane mode.
patternProperties:
"^port@[0-3]$":
@@ -156,26 +157,86 @@ properties:
unevaluatedProperties: false
description:
- Input port for receiving CSI data from a CSIPHY.
+ Input port for receiving CSI data.
properties:
- endpoint:
+ endpoint@0:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
+ description:
+ Endpoint for receiving a single sensor input (or first leg of combo).
+
properties:
data-lanes:
minItems: 1
- maxItems: 4
+ maxItems: 4 # Base max allows 4 (for D-PHY)
+
+ clock-lanes:
+ maxItems: 1
bus-type:
enum:
- 1 # MEDIA_BUS_TYPE_CSI2_CPHY
- 4 # MEDIA_BUS_TYPE_CSI2_DPHY
+ endpoint@1:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ description:
+ Endpoint for receiving the second leg of a combo sensor input.
+
+ properties:
+ data-lanes:
+ maxItems: 1
+
+ clock-lanes:
+ maxItems: 1
+
+ bus-type:
+ const: 4 # Combo is D-PHY specific
+
required:
- data-lanes
+ allOf:
+ # Case 1: Combo Mode (endpoint@1 is present)
+ # If endpoint@1 exists, we restrict endpoint@0 to 2 lanes (D-PHY split)
+ - if:
+ required:
+ - endpoint@1
+ then:
+ properties:
+ endpoint@0:
+ properties:
+ data-lanes:
+ minItems: 2
+ maxItems: 2
+ bus-type:
+ const: 4
+ endpoint@1:
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 1
+ bus-type:
+ const: 4
+
+ # Case 2: Single Mode (endpoint@1 is missing)
+ # We explicitly allow up to 4 lanes here to cover the D-PHY use case.
+ - if:
+ not:
+ required:
+ - endpoint@1
+ then:
+ properties:
+ endpoint@0:
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
patternProperties:
"^phy@[0-9a-f]+$":
$ref: /schemas/phy/qcom,x1e80100-csi2-phy.yaml
--
2.52.0On 3/26/26 03:28, Bryan O'Donoghue wrote: > Qualcomm CSI2 PHYs support a mode where two sensors may be attached to the > one CSIPHY. > > When we have one endpoint we may have > - DPHY 1, 2 or 4 data lanes + 1 clock lane > - CPHY 3 wire data lane > > When we have two endpoints this indicates the special fixed combo-mode. > - DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane combination. > > Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> > --- > .../bindings/media/qcom,x1e80100-camss.yaml | 69 ++++++++++++++++++++-- > 1 file changed, 65 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > index c17b9757b2c86..f44138f522bba 100644 > --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml > @@ -148,7 +148,8 @@ properties: > $ref: /schemas/graph.yaml#/properties/ports > > description: > - CSI input ports. > + CSI input ports. Supports either standard single sensor mode or > + Qualcomm's combo mode with one sensor in 2x1 + 1x1 data-lane, clock-lane mode. > > patternProperties: > "^port@[0-3]$": > @@ -156,26 +157,86 @@ properties: > unevaluatedProperties: false > > description: > - Input port for receiving CSI data from a CSIPHY. > + Input port for receiving CSI data. > > properties: > - endpoint: > + endpoint@0: > $ref: video-interfaces.yaml# > unevaluatedProperties: false > > + description: > + Endpoint for receiving a single sensor input (or first leg of combo). > + > properties: > data-lanes: > minItems: 1 > - maxItems: 4 > + maxItems: 4 # Base max allows 4 (for D-PHY) > + > + clock-lanes: > + maxItems: 1 > > bus-type: > enum: > - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > > + endpoint@1: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + description: > + Endpoint for receiving the second leg of a combo sensor input. > + > + properties: > + data-lanes: > + maxItems: 1 > + > + clock-lanes: > + maxItems: 1 > + > + bus-type: > + const: 4 # Combo is D-PHY specific > + It's unclear why both 'bus-type' and 'phys' cell argument are needed at the same time, they are equal and thus one of two is redundant. -- Best wishes, Vladimir
On 26/03/2026 01:51, Vladimir Zapolskiy wrote: > On 3/26/26 03:28, Bryan O'Donoghue wrote: >> Qualcomm CSI2 PHYs support a mode where two sensors may be attached to >> the >> one CSIPHY. >> >> When we have one endpoint we may have >> - DPHY 1, 2 or 4 data lanes + 1 clock lane >> - CPHY 3 wire data lane >> >> When we have two endpoints this indicates the special fixed combo-mode. >> - DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane >> combination. >> >> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> >> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> >> --- >> .../bindings/media/qcom,x1e80100-camss.yaml | 69 ++++++++++++ >> ++++++++-- >> 1 file changed, 65 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100- >> camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100- >> camss.yaml >> index c17b9757b2c86..f44138f522bba 100644 >> --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml >> +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml >> @@ -148,7 +148,8 @@ properties: >> $ref: /schemas/graph.yaml#/properties/ports >> description: >> - CSI input ports. >> + CSI input ports. Supports either standard single sensor mode or >> + Qualcomm's combo mode with one sensor in 2x1 + 1x1 data-lane, >> clock-lane mode. >> patternProperties: >> "^port@[0-3]$": >> @@ -156,26 +157,86 @@ properties: >> unevaluatedProperties: false >> description: >> - Input port for receiving CSI data from a CSIPHY. >> + Input port for receiving CSI data. >> properties: >> - endpoint: >> + endpoint@0: >> $ref: video-interfaces.yaml# >> unevaluatedProperties: false >> + description: >> + Endpoint for receiving a single sensor input (or first >> leg of combo). >> + >> properties: >> data-lanes: >> minItems: 1 >> - maxItems: 4 >> + maxItems: 4 # Base max allows 4 (for D-PHY) >> + >> + clock-lanes: >> + maxItems: 1 >> bus-type: >> enum: >> - 1 # MEDIA_BUS_TYPE_CSI2_CPHY >> - 4 # MEDIA_BUS_TYPE_CSI2_DPHY >> + endpoint@1: >> + $ref: video-interfaces.yaml# >> + unevaluatedProperties: false >> + >> + description: >> + Endpoint for receiving the second leg of a combo sensor >> input. >> + >> + properties: >> + data-lanes: >> + maxItems: 1 >> + >> + clock-lanes: >> + maxItems: 1 >> + >> + bus-type: >> + const: 4 # Combo is D-PHY specific >> + > > It's unclear why both 'bus-type' and 'phys' cell argument are needed > at the same time, they are equal and thus one of two is redundant. > bus-type lives on the CAMSS controller endpoint. It tells the V4L2 fwnode parser (v4l2_fwnode_endpoint_parse) how to interpret the endpoint properties — DPHY has data-lanes + clock-lanes, CPHY has trios. PHY phandle cell lives on the phys reference. It tells the PHY driver which electrical mode to configure --- bod
On 3/26/26 3:08 AM, Bryan O'Donoghue wrote: > On 26/03/2026 01:51, Vladimir Zapolskiy wrote: >> On 3/26/26 03:28, Bryan O'Donoghue wrote: >>> Qualcomm CSI2 PHYs support a mode where two sensors may be attached to the >>> one CSIPHY. >>> >>> When we have one endpoint we may have >>> - DPHY 1, 2 or 4 data lanes + 1 clock lane >>> - CPHY 3 wire data lane >>> >>> When we have two endpoints this indicates the special fixed combo-mode. >>> - DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane combination. >>> >>> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> >>> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> >>> --- [...] >>> + bus-type: >>> + const: 4 # Combo is D-PHY specific >>> + >> >> It's unclear why both 'bus-type' and 'phys' cell argument are needed >> at the same time, they are equal and thus one of two is redundant. >> > > bus-type lives on the CAMSS controller endpoint. It tells the V4L2 fwnode parser (v4l2_fwnode_endpoint_parse) how to interpret the endpoint properties — DPHY has data-lanes + clock-lanes, CPHY has trios. > > PHY phandle cell lives on the phys reference. It tells the PHY driver which electrical mode to configure But we don't need that second part, no? If it's strictly required that we keep the bus-type in DT, we already store that information once and can translate MEDIA_BUS_TYPE_CSI2_DPHY to PHY_MODE_MIPI_CSI or whatever before we power on the PHY (which we wouldn't do without first setting up other bits of the topology anyway) Konrad
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