From: Biju Das <biju.das.jz@bp.renesas.com>
The total number of interrupts in RZ/G2L and RZ/G3L SoC are different.
Introduce struct rzg2l_hw_info to handle the hardware differences and
replace the macro IRQC_NUM_IRQ with num_irq variable in struct
rzg2l_hw_info.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* Dropped the hw_irq range check involving info.num_irq
v3->v4:
* Updated commit description IRQs->interrupts
* Replaced the variable type for num_irq in struct rzg2l_hw_info from
u8->unsigned int
* Replaced the pointer variable info from irqc_priv and instead embed a
struct hwinfo into irqc_priv and copy the data into it at probe time.
* Replaced the check 'hwirq > (priv->info->num_irq - 1)' with
hwirq >= priv->info.num_irq
v2->v3:
* No change
v1->v2:
* No change
---
drivers/irqchip/irq-renesas-rzg2l.c | 34 ++++++++++++++++++++++-------
1 file changed, 26 insertions(+), 8 deletions(-)
diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c
index 9fc90f894630..2b7a70bdcba1 100644
--- a/drivers/irqchip/irq-renesas-rzg2l.c
+++ b/drivers/irqchip/irq-renesas-rzg2l.c
@@ -24,7 +24,6 @@
#define IRQC_IRQ_COUNT 8
#define IRQC_TINT_START (IRQC_IRQ_START + IRQC_IRQ_COUNT)
#define IRQC_TINT_COUNT 32
-#define IRQC_NUM_IRQ (IRQC_TINT_START + IRQC_TINT_COUNT)
#define ISCR 0x10
#define IITSR 0x14
@@ -68,6 +67,14 @@ struct rzg2l_irqc_reg_cache {
u32 titsr[2];
};
+/**
+ * struct rzg2l_hw_info - Interrupt Control Unit controller hardware info structure.
+ * @num_irq: Total Number of interrupts
+ */
+struct rzg2l_hw_info {
+ unsigned int num_irq;
+};
+
/**
* struct rzg2l_irqc_priv - IRQ controller private data structure
* @base: Controller's base address
@@ -75,6 +82,7 @@ struct rzg2l_irqc_reg_cache {
* @tint_chip: Pointer to struct irq_chip for tint
* @fwspec: IRQ firmware specific data
* @lock: Lock to serialize access to hardware registers
+ * @info: Hardware specific data
* @cache: Registers cache for suspend/resume
*/
static struct rzg2l_irqc_priv {
@@ -83,6 +91,7 @@ static struct rzg2l_irqc_priv {
const struct irq_chip *tint_chip;
struct irq_fwspec *fwspec;
raw_spinlock_t lock;
+ struct rzg2l_hw_info info;
struct rzg2l_irqc_reg_cache cache;
} *rzg2l_irqc_data;
@@ -573,7 +582,7 @@ static int rzg2l_irqc_alloc(struct irq_domain *domain, unsigned int virq,
chip = priv->irq_chip;
}
- if (hwirq > (IRQC_NUM_IRQ - 1))
+ if (hwirq >= priv->info.num_irq)
return -EINVAL;
ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq, chip, (void *)(uintptr_t)tint);
@@ -596,7 +605,7 @@ static int rzg2l_irqc_parse_interrupts(struct rzg2l_irqc_priv *priv,
unsigned int i;
int ret;
- for (i = 0; i < IRQC_NUM_IRQ; i++) {
+ for (i = 0; i < priv->info.num_irq; i++) {
ret = of_irq_parse_one(np, i, &map);
if (ret)
return ret;
@@ -609,7 +618,8 @@ static int rzg2l_irqc_parse_interrupts(struct rzg2l_irqc_priv *priv,
static int rzg2l_irqc_common_probe(struct platform_device *pdev, struct device_node *parent,
const struct irq_chip *irq_chip,
- const struct irq_chip *tint_chip)
+ const struct irq_chip *tint_chip,
+ const struct rzg2l_hw_info info)
{
struct irq_domain *irq_domain, *parent_domain;
struct device_node *node = pdev->dev.of_node;
@@ -632,7 +642,9 @@ static int rzg2l_irqc_common_probe(struct platform_device *pdev, struct device_n
if (IS_ERR(rzg2l_irqc_data->base))
return PTR_ERR(rzg2l_irqc_data->base);
- rzg2l_irqc_data->fwspec = devm_kcalloc(&pdev->dev, IRQC_NUM_IRQ,
+ rzg2l_irqc_data->info = info;
+
+ rzg2l_irqc_data->fwspec = devm_kcalloc(&pdev->dev, info.num_irq,
sizeof(*rzg2l_irqc_data->fwspec), GFP_KERNEL);
if (!rzg2l_irqc_data->fwspec)
return -ENOMEM;
@@ -657,7 +669,7 @@ static int rzg2l_irqc_common_probe(struct platform_device *pdev, struct device_n
raw_spin_lock_init(&rzg2l_irqc_data->lock);
- irq_domain = irq_domain_create_hierarchy(parent_domain, 0, IRQC_NUM_IRQ, dev_fwnode(dev),
+ irq_domain = irq_domain_create_hierarchy(parent_domain, 0, info.num_irq, dev_fwnode(dev),
&rzg2l_irqc_domain_ops, rzg2l_irqc_data);
if (!irq_domain) {
pm_runtime_put_sync(dev);
@@ -669,14 +681,20 @@ static int rzg2l_irqc_common_probe(struct platform_device *pdev, struct device_n
return 0;
}
+static const struct rzg2l_hw_info rzg2l_hw_params = {
+ .num_irq = IRQC_IRQ_START + IRQC_IRQ_COUNT + IRQC_TINT_COUNT,
+};
+
static int rzg2l_irqc_probe(struct platform_device *pdev, struct device_node *parent)
{
- return rzg2l_irqc_common_probe(pdev, parent, &rzg2l_irqc_irq_chip, &rzg2l_irqc_tint_chip);
+ return rzg2l_irqc_common_probe(pdev, parent, &rzg2l_irqc_irq_chip, &rzg2l_irqc_tint_chip,
+ rzg2l_hw_params);
}
static int rzfive_irqc_probe(struct platform_device *pdev, struct device_node *parent)
{
- return rzg2l_irqc_common_probe(pdev, parent, &rzfive_irqc_irq_chip, &rzfive_irqc_tint_chip);
+ return rzg2l_irqc_common_probe(pdev, parent, &rzfive_irqc_irq_chip, &rzfive_irqc_tint_chip,
+ rzg2l_hw_params);
}
IRQCHIP_PLATFORM_DRIVER_BEGIN(rzg2l_irqc)
--
2.43.0