On both i.MX8MP EVK and i.MX95-15x15 EVK boards, the M.2 connector
shares a common regulator between USDHC (for SDIO WiFi) and PCIe
controllers. The non-deterministic probe order between these two
buses can break the PCIe initialization sequence, causing PCIe
devices to fail detection intermittently.

The out-of-box module on i.MX8MP EVK and i.MX95-15x15 EVK are SDIO
WiFi (IW612), this series changes the default configuration to
match the out-of-box hardware (SDIO WiFi) and provides a device
tree overlay for users who need PCIe functionality:
1. Disable PCIe in the default device tree
2. Keep USDHC enabled for SDIO WiFi
3. Add 'm2_usdhc' label to support overlay
4. Provide a common overlay (imx-m2-pcie.dtso) to enable PCIe and
   disable USDHC when needed

---
Changes in V3:
1. Add a common overlay imx-m2-pcie.dtso for both i.MX8MP EVK and
   i.MX95-15x15 EVK. 
2. Add 'm2_usdhc' label to support overlay.

Changes in V2:
1. Improve the commit message to clarify SDIO WiFi is the out-of-box
   module on i.MX8MP EVK and i.MX95-15x15 EVK.
---
Sherry Sun (3):
  arm64: dts: imx8mp-evk: Disable PCIe bus in the default dts
  arm64: dts: imx95-15x15-evk: Disable PCIe bus in the default dts
  arm64: dts: imx: Add common imx-m2-pcie.dtso to enable PCIe on M.2
    connector

 arch/arm64/boot/dts/freescale/Makefile            |  9 +++++++--
 arch/arm64/boot/dts/freescale/imx-m2-pcie.dtso    | 15 +++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts      |  4 ++--
 arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts |  4 ++--
 4 files changed, 26 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/imx-m2-pcie.dtso

-- 
2.37.1