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[PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes

Yixun Lan posted 2 patches 1 week, 1 day ago
[PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Yixun Lan 1 week, 1 day ago 
Populate all I2C devicetree nodes for SpacemiT K3 SoC.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 arch/riscv/boot/dts/spacemit/k3.dtsi | 98 ++++++++++++++++++++++++++++++++++++
 1 file changed, 98 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
index a3a8ceddabec..cab72591b7f1 100644
--- a/arch/riscv/boot/dts/spacemit/k3.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
@@ -438,6 +438,76 @@ soc: soc {
 		dma-noncoherent;
 		ranges;
 
+		i2c0: i2c@d4010800 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd4010800 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI0>,
+				 <&syscon_apbc CLK_APBC_TWSI0_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@d4011000 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd4011000 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI1>,
+				 <&syscon_apbc CLK_APBC_TWSI1_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI1>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@d4012000 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd4012000 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI2>,
+				 <&syscon_apbc CLK_APBC_TWSI2_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI2>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@d4012800 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd4012800 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI4>,
+				 <&syscon_apbc CLK_APBC_TWSI4_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI4>;
+			status = "disabled";
+		};
+
+		i2c5: i2c@d4013800 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd4013800 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI5>,
+				 <&syscon_apbc CLK_APBC_TWSI5_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI5>;
+			status = "disabled";
+		};
+
 		syscon_apbc: system-controller@d4015000 {
 			compatible = "spacemit,k3-syscon-apbc";
 			reg = <0x0 0xd4015000 0x0 0x1000>;
@@ -564,6 +634,20 @@ uart9: serial@d4017800 {
 			status = "disabled";
 		};
 
+		i2c6: i2c@d4018800 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd4018800 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI6>,
+				 <&syscon_apbc CLK_APBC_TWSI6_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI6>;
+			status = "disabled";
+		};
+
 		gpio: gpio@d4019000 {
 			compatible = "spacemit,k3-gpio";
 			reg = <0x0 0xd4019000 0x0 0x100>;
@@ -582,6 +666,20 @@ gpio: gpio@d4019000 {
 				      <&pinctrl 3 0 96 32>;
 		};
 
+		i2c8: i2c@d401d800 {
+			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
+			reg = <0x0 0xd401d800 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&syscon_apbc CLK_APBC_TWSI8>,
+				 <&syscon_apbc CLK_APBC_TWSI8_BUS>;
+			clock-names = "func", "bus";
+			clock-frequency = <400000>;
+			resets = <&syscon_apbc RESET_APBC_TWSI8>;
+			status = "disabled";
+		};
+
 		pinctrl: pinctrl@d401e000 {
 			compatible = "spacemit,k3-pinctrl";
 			reg = <0x0 0xd401e000 0x0 0x1000>;

-- 
2.53.0
Re: [PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Andi Shyti 1 week ago 
Hi Yixun,

On Wed, Mar 25, 2026 at 09:49:25AM +0000, Yixun Lan wrote:
> Populate all I2C devicetree nodes for SpacemiT K3 SoC.
> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>

this second patch does not apply on my i2c branch. I'm missing
some other patches on k3.

Can you please rebase it on top of my i2c/i2c-host branch,
otherwise I will need to wait for the merge window to open in
order to take this.

Andi
Re: [PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Andi Shyti 1 week ago 
Hi agagin,

On Thu, Mar 26, 2026 at 11:22:31PM +0100, Andi Shyti wrote:
> On Wed, Mar 25, 2026 at 09:49:25AM +0000, Yixun Lan wrote:
> > Populate all I2C devicetree nodes for SpacemiT K3 SoC.
> > 
> > Signed-off-by: Yixun Lan <dlan@kernel.org>
> 
> this second patch does not apply on my i2c branch. I'm missing
> some other patches on k3.
> 
> Can you please rebase it on top of my i2c/i2c-host branch,
> otherwise I will need to wait for the merge window to open in
> order to take this.

sorry, this has to go through some other path, I'm going to take
patch 1.

Andi
Re: [PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Yixun Lan 6 days, 23 hours ago 
Hi Andi,

On 23:24 Thu 26 Mar     , Andi Shyti wrote:
> Hi agagin,
> 
> On Thu, Mar 26, 2026 at 11:22:31PM +0100, Andi Shyti wrote:
> > On Wed, Mar 25, 2026 at 09:49:25AM +0000, Yixun Lan wrote:
> > > Populate all I2C devicetree nodes for SpacemiT K3 SoC.
> > > 
> > > Signed-off-by: Yixun Lan <dlan@kernel.org>
> > 
> > this second patch does not apply on my i2c branch. I'm missing
> > some other patches on k3.
> > 
> > Can you please rebase it on top of my i2c/i2c-host branch,
> > otherwise I will need to wait for the merge window to open in
> > order to take this.
> 
> sorry, this has to go through some other path, I'm going to take
> patch 1.
Right, I will take care of it, DT patch should go via SpacemiT SoC tree.


-- 
Yixun Lan (dlan)
Re: [PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Troy Mitchell 1 week, 1 day ago 
On Wed Mar 25, 2026 at 5:49 PM CST, Yixun Lan wrote:
> Populate all I2C devicetree nodes for SpacemiT K3 SoC.
>
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
>  arch/riscv/boot/dts/spacemit/k3.dtsi | 98 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 98 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
> index a3a8ceddabec..cab72591b7f1 100644
> --- a/arch/riscv/boot/dts/spacemit/k3.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
> @@ -438,6 +438,76 @@ soc: soc {
>  		dma-noncoherent;
>  		ranges;
>  
> +		i2c0: i2c@d4010800 {
> +			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
> +			reg = <0x0 0xd4010800 0x0 0x38>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&syscon_apbc CLK_APBC_TWSI0>,
> +				 <&syscon_apbc CLK_APBC_TWSI0_BUS>;
> +			clock-names = "func", "bus";
> +			clock-frequency = <400000>;
> +			resets = <&syscon_apbc RESET_APBC_TWSI0>;
> +			status = "disabled";
> +		};
> +
> +		i2c1: i2c@d4011000 {
> +			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
> +			reg = <0x0 0xd4011000 0x0 0x38>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&syscon_apbc CLK_APBC_TWSI1>,
> +				 <&syscon_apbc CLK_APBC_TWSI1_BUS>;
> +			clock-names = "func", "bus";
> +			clock-frequency = <400000>;
> +			resets = <&syscon_apbc RESET_APBC_TWSI1>;
> +			status = "disabled";
> +		};
> +
> +		i2c2: i2c@d4012000 {
> +			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
> +			reg = <0x0 0xd4012000 0x0 0x38>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&syscon_apbc CLK_APBC_TWSI2>,
> +				 <&syscon_apbc CLK_APBC_TWSI2_BUS>;
> +			clock-names = "func", "bus";
> +			clock-frequency = <400000>;
> +			resets = <&syscon_apbc RESET_APBC_TWSI2>;
> +			status = "disabled";
> +		};
I think we should add a comment here to explain why there isn't i2c3.
Otherwise, LGTM.

Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Re: [PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Andi Shyti 1 week ago 
Hi Yixun,

> > +		i2c2: i2c@d4012000 {
> > +			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
> > +			reg = <0x0 0xd4012000 0x0 0x38>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&syscon_apbc CLK_APBC_TWSI2>,
> > +				 <&syscon_apbc CLK_APBC_TWSI2_BUS>;
> > +			clock-names = "func", "bus";
> > +			clock-frequency = <400000>;
> > +			resets = <&syscon_apbc RESET_APBC_TWSI2>;
> > +			status = "disabled";
> > +		};
> I think we should add a comment here to explain why there isn't i2c3.
> Otherwise, LGTM.

are you going to add a comment here?

> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Re: [PATCH 2/2] dts: riscv: spacemit: k3: Add i2c nodes
Posted by Yixun Lan 6 days, 23 hours ago 
Hi Andi,

On 23:23 Thu 26 Mar     , Andi Shyti wrote:
> Hi Yixun,
> 
> > > +		i2c2: i2c@d4012000 {
> > > +			compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
> > > +			reg = <0x0 0xd4012000 0x0 0x38>;
> > > +			#address-cells = <1>;
> > > +			#size-cells = <0>;
> > > +			interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
> > > +			clocks = <&syscon_apbc CLK_APBC_TWSI2>,
> > > +				 <&syscon_apbc CLK_APBC_TWSI2_BUS>;
> > > +			clock-names = "func", "bus";
> > > +			clock-frequency = <400000>;
> > > +			resets = <&syscon_apbc RESET_APBC_TWSI2>;
> > > +			status = "disabled";
> > > +		};
> > I think we should add a comment here to explain why there isn't i2c3.
> > Otherwise, LGTM.
> 
> are you going to add a comment here?
> 
I will explain and re-spin a v2, and add a short comment for this:
- i2c3 is reserved for secure domain which not available from linux
- i2c7 simply does not exist from hardware perspective, K3 SoC want to
keep align with K1 to use same index of I2C controller for the pmic

> > Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> 

-- 
Yixun Lan (dlan)

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