Hi,

The current watchdog driver handling wachdogs of the RZ/N1 SoCs is based
on interrupt only to perform the reset. On the watchdog timeout, an
interrupt is triggered and the software initiates the reset.

The watchdogs available in the RZ/N1 SoCs can directly perform an
hardware reset using their dedicated reset line.

On timeout, the watchdog also asserts its dedicated reset line. This
reset line is connected to the reset controller (part of sysctrl) and,
if this line is enabled as a possible reset source at the reset
controller level, it initiates a system reset.

This series adds support for this feature allowing watchdogs to directly
reset the system without any software needs when a watchdog timeout
occurs.

Compare to previous iteration, in this v3 series patches 1 and 2 have
been removed (sent in a dedicated series) and a swap in OR-ed value
lines has been done.

Best regards,
Hervé

Changes v2 -> v3
  v2: https://lore.kernel.org/all/20260313092417.294356-1-herve.codina@bootlin.com/

  Patches 1 and 2 in v2 removed
    Those patches have been sent in a dedicated series.
    https://lore.kernel.org/all/20260324114849.242755-1-herve.codina@bootlin.com/

  Patch 1 (patch 3 in v2)
    Swap OR-ed value lines in order to have MRESET_EN at the end.
    Add 'Reviewed-by: Wolfram Sang'
    Add 'Tested-by: Wolfram Sang'

Changes v1 -> v2:
  v1: https://lore.kernel.org/lkml/20260310173249.161354-1-herve.codina@bootlin.com/

  Patch 1 and 2:
    No changes

  Patch 3 (new in v2):
    Unconditionally enable watchdog reset sources

  Patch 3, 4 and 5 in v1:
    Removed

Herve Codina (Schneider Electric) (1):
  clk: renesas: r9a06g032: Enable watchdog reset sources

 drivers/clk/renesas/r9a06g032-clocks.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

-- 
2.53.0