Convert the xilinx-xadc.txt to DT schema and remove the old text binding.
Update xilinx-xadc binding path to YAML format in MAINTAINERS file.
The 'xlnx,channels' property is a container node(type: object) with
a vendor prefix, which triggers the below warning:
"properties:xlnx,channels:type: 'boolean' was expected"
This cannot be changed because the original text binding specified
'xlnx,channels' since 2014, driver explicitly looks up "xlnx,channels"
using device_get_named_child_node() and removing the vendor prefix
would break backward compatibility with existing device trees.
Also, keep all vendor-prefixed properties from the original binding to
maintain backward compatibility with existing devicetrees and driver code.
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
---
.../bindings/iio/adc/xilinx-xadc.txt | 141 ----------------
.../bindings/iio/adc/xlnx,axi-xadc.yaml | 154 ++++++++++++++++++
2 files changed, 154 insertions(+), 141 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
create mode 100644 Documentation/devicetree/bindings/iio/adc/xlnx,axi-xadc.yaml
diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
deleted file mode 100644
index f42e18078376..000000000000
--- a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
+++ /dev/null
@@ -1,141 +0,0 @@
-Xilinx XADC device driver
-
-This binding document describes the bindings for the Xilinx 7 Series XADC as well
-as the UltraScale/UltraScale+ System Monitor.
-
-The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx.
-The XADC has a DRP interface for communication. Currently two different
-frontends for the DRP interface exist. One that is only available on the ZYNQ
-family as a hardmacro in the SoC portion of the ZYNQ. The other one is available
-on all series 7 platforms and is a softmacro with a AXI interface. This binding
-document describes the bindings for both of them since the bindings are very
-similar.
-
-The Xilinx System Monitor is an ADC that is found in the UltraScale and
-UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface for
-communication. Xilinx provides a standard IP core that can be used to access the
-System Monitor through an AXI interface in the FPGA fabric. This IP core is
-called the Xilinx System Management Wizard. This document describes the bindings
-for this IP.
-
-Required properties:
- - compatible: Should be one of
- * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
- configuration interface to interface to the XADC hardmacro.
- * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
- interface to the XADC hardmacro.
- * "xlnx,system-management-wiz-1.3": When using the
- Xilinx System Management Wizard fabric IP core to access the
- UltraScale and UltraScale+ System Monitor.
- - reg: Address and length of the register set for the device
- - interrupts: Interrupt for the XADC control interface.
- - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
- when using the axi-xadc or the axi-system-management-wizard this must be
- the clock that provides the clock to the AXI bus interface of the core.
-
-Optional properties:
- - xlnx,external-mux:
- * "none": No external multiplexer is used, this is the default
- if the property is omitted.
- * "single": External multiplexer mode is used with one
- multiplexer.
- * "dual": External multiplexer mode is used with two
- multiplexers for simultaneous sampling.
- - xlnx,external-mux-channel: Configures which pair of pins is used to
- sample data in external mux mode.
- Valid values for single external multiplexer mode are:
- 0: VP/VN
- 1: VAUXP[0]/VAUXN[0]
- 2: VAUXP[1]/VAUXN[1]
- ...
- 16: VAUXP[15]/VAUXN[15]
- Valid values for dual external multiplexer mode are:
- 1: VAUXP[0]/VAUXN[0] - VAUXP[8]/VAUXN[8]
- 2: VAUXP[1]/VAUXN[1] - VAUXP[9]/VAUXN[9]
- ...
- 8: VAUXP[7]/VAUXN[7] - VAUXP[15]/VAUXN[15]
-
- This property needs to be present if the device is configured for
- external multiplexer mode (either single or dual). If the device is
- not using external multiplexer mode the property is ignored.
- - xnlx,channels: List of external channels that are connected to the ADC
- Required properties:
- * #address-cells: Should be 1.
- * #size-cells: Should be 0.
-
- The child nodes of this node represent the external channels which are
- connected to the ADC. If the property is no present no external
- channels will be assumed to be connected.
-
- Each child node represents one channel and has the following
- properties:
- Required properties:
- * reg: Pair of pins the channel is connected to.
- 0: VP/VN
- 1: VAUXP[0]/VAUXN[0]
- 2: VAUXP[1]/VAUXN[1]
- ...
- 16: VAUXP[15]/VAUXN[15]
- Note each channel number should only be used at most
- once.
- Optional properties:
- * xlnx,bipolar: If set the channel is used in bipolar
- mode.
-
-
-Examples:
- xadc@f8007100 {
- compatible = "xlnx,zynq-xadc-1.00.a";
- reg = <0xf8007100 0x20>;
- interrupts = <0 7 4>;
- interrupt-parent = <&gic>;
- clocks = <&pcap_clk>;
-
- xlnx,channels {
- #address-cells = <1>;
- #size-cells = <0>;
- channel@0 {
- reg = <0>;
- };
- channel@1 {
- reg = <1>;
- };
- channel@8 {
- reg = <8>;
- };
- };
- };
-
- xadc@43200000 {
- compatible = "xlnx,axi-xadc-1.00.a";
- reg = <0x43200000 0x1000>;
- interrupts = <0 53 4>;
- interrupt-parent = <&gic>;
- clocks = <&fpga1_clk>;
-
- xlnx,channels {
- #address-cells = <1>;
- #size-cells = <0>;
- channel@0 {
- reg = <0>;
- xlnx,bipolar;
- };
- };
- };
-
- adc@80000000 {
- compatible = "xlnx,system-management-wiz-1.3";
- reg = <0x80000000 0x1000>;
- interrupts = <0 81 4>;
- interrupt-parent = <&gic>;
- clocks = <&fpga1_clk>;
-
- xlnx,channels {
- #address-cells = <1>;
- #size-cells = <0>;
- channel@0 {
- reg = <0>;
- xlnx,bipolar;
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,axi-xadc.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,axi-xadc.yaml
new file mode 100644
index 000000000000..e384928d60eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/xlnx,axi-xadc.yaml
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/xlnx,axi-xadc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx XADC and System Monitor ADC
+
+description:
+ The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from
+ Xilinx. The XADC has a DRP interface for communication. Currently two
+ different frontends for the DRP interface exist. One that is only available
+ on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The other
+ one is available on all series 7 platforms and is a softmacro with an AXI
+ interface.
+
+ The Xilinx System Monitor is an ADC that is found in the UltraScale and
+ UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface
+ for communication. Xilinx provides a standard IP core that can be used to
+ access the System Monitor through an AXI interface in the FPGA fabric. This
+ IP core is called the Xilinx System Management Wizard.
+
+maintainers:
+ - Lars-Peter Clausen <lars@metafoo.de>
+ - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
+
+properties:
+ compatible:
+ enum:
+ - xlnx,zynq-xadc-1.00.a
+ - xlnx,axi-xadc-1.00.a
+ - xlnx,system-management-wiz-1.3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+ description:
+ When using the ZYNQ this must be the ZYNQ PCAP clock,
+ when using the axi-xadc or the axi-system-management-wizard this must be
+ the clock that provides the clock to the AXI bus interface of the core.
+
+ xlnx,external-mux:
+ $ref: /schemas/types.yaml#/definitions/string
+ enum:
+ - none
+ - single
+ - dual
+ default: none
+ description: |
+ External multiplexer configuration:
+ - "none": No external multiplexer is used
+ - "single": External multiplexer mode is used with one multiplexer
+ - "dual": External multiplexer mode is used with two multiplexers
+ for simultaneous sampling
+
+ xlnx,external-mux-channel:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 16
+ description: |
+ Configures which pair of pins is used to sample data in external mux mode.
+ Valid values for single external multiplexer mode are 0-16:
+ 0: VP/VN
+ 1-16: VAUXP[0-15]/VAUXN[0-15]
+ Valid values for dual external multiplexer mode are 1-8:
+ 1-8: VAUXP[0-7]/VAUXN[0-7] - VAUXP[8-15]/VAUXN[8-15]
+ This property needs to be present if the device is configured for
+ external multiplexer mode (either single or dual).
+
+ xlnx,channels:
+ description: List of external channels that are connected to the ADC
+ type: object
+ properties:
+ '#address-cells':
+ const: 1
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ "^channel@([0-9]|1[0-6])$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 16
+ description: |
+ Pair of pins the channel is connected to:
+ 0: VP/VN
+ 1-16: VAUXP[0-15]/VAUXN[0-15]
+ Note each channel number should only be used at most once.
+
+ xlnx,bipolar:
+ type: boolean
+ description: If set, the channel is used in bipolar mode
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+ required:
+ - '#address-cells'
+ - '#size-cells'
+
+ additionalProperties: false
+
+allOf:
+ - if:
+ required:
+ - xlnx,external-mux
+ properties:
+ xlnx,external-mux:
+ enum:
+ - single
+ - dual
+ then:
+ required:
+ - xlnx,external-mux-channel
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ adc@f8007100 {
+ compatible = "xlnx,zynq-xadc-1.00.a";
+ reg = <0xf8007100 0x20>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcap_clk>;
+
+ xlnx,channels {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel@0 {
+ reg = <0>;
+ };
+ channel@1 {
+ reg = <1>;
+ };
+ channel@8 {
+ reg = <8>;
+ };
+ };
+ };
--
2.25.1On Mon, 23 Mar 2026 13:15:05 +0530, Sai Krishna Potthuri wrote: > Convert the xilinx-xadc.txt to DT schema and remove the old text binding. > Update xilinx-xadc binding path to YAML format in MAINTAINERS file. > > The 'xlnx,channels' property is a container node(type: object) with > a vendor prefix, which triggers the below warning: > "properties:xlnx,channels:type: 'boolean' was expected" > > This cannot be changed because the original text binding specified > 'xlnx,channels' since 2014, driver explicitly looks up "xlnx,channels" > using device_get_named_child_node() and removing the vendor prefix > would break backward compatibility with existing device trees. > Also, keep all vendor-prefixed properties from the original binding to > maintain backward compatibility with existing devicetrees and driver code. > > Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> > --- > .../bindings/iio/adc/xilinx-xadc.txt | 141 ---------------- > .../bindings/iio/adc/xlnx,axi-xadc.yaml | 154 ++++++++++++++++++ > 2 files changed, 154 insertions(+), 141 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt > create mode 100644 Documentation/devicetree/bindings/iio/adc/xlnx,axi-xadc.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/adc/xlnx,axi-xadc.yaml: properties:xlnx,channels:type: 'boolean' was expected hint: A vendor boolean property can use "type: boolean" from schema $id: http://devicetree.org/meta-schemas/vendor-props.yaml doc reference errors (make refcheckdocs): See https://patchwork.kernel.org/project/devicetree/patch/20260323074505.3853353-5-sai.krishna.potthuri@amd.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
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