Update the context reset reason enum with the missing reset reasons in
the 6-11 value gap:
- CDM Mission/safety checksum mismatch;
- TRP checksum mismatch;
- GPU ECC error (corrected, OK);
- GPU ECC error (uncorrected, HWR);
- FW ECC error (corrected, OK);
- FW ECC error (uncorrected, ERR);
Co-developed-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Alexandru Dadu <alexandru.dadu@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
---
drivers/gpu/drm/imagination/pvr_rogue_fwif_shared.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/imagination/pvr_rogue_fwif_shared.h b/drivers/gpu/drm/imagination/pvr_rogue_fwif_shared.h
index 6c09c15bf9bd..f622553cdc11 100644
--- a/drivers/gpu/drm/imagination/pvr_rogue_fwif_shared.h
+++ b/drivers/gpu/drm/imagination/pvr_rogue_fwif_shared.h
@@ -236,6 +236,18 @@ enum rogue_context_reset_reason {
ROGUE_CONTEXT_RESET_REASON_INNOCENT_OVERRUNING = 4,
/* Forced reset to ensure scheduling requirements */
ROGUE_CONTEXT_RESET_REASON_HARD_CONTEXT_SWITCH = 5,
+ /* CDM Mission/safety checksum mismatch */
+ ROGUE_CONTEXT_RESET_REASON_WGP_CHECKSUM = 6,
+ /* TRP checksum mismatch */
+ ROGUE_CONTEXT_RESET_REASON_TRP_CHECKSUM = 7,
+ /* GPU ECC error (corrected, OK) */
+ ROGUE_CONTEXT_RESET_REASON_GPU_ECC_OK = 8,
+ /* GPU ECC error (uncorrected, HWR) */
+ ROGUE_CONTEXT_RESET_REASON_GPU_ECC_HWR = 9,
+ /* FW ECC error (corrected, OK) */
+ ROGUE_CONTEXT_RESET_REASON_FW_ECC_OK = 10,
+ /* FW ECC error (uncorrected, ERR) */
+ ROGUE_CONTEXT_RESET_REASON_FW_ECC_ERR = 11,
/* FW Safety watchdog triggered */
ROGUE_CONTEXT_RESET_REASON_FW_WATCHDOG = 12,
/* FW page fault (no HWR) */
--
2.43.0