On some Loongson 3A devices, a LPC bus is present and some legacy
devices (e.g. 8259) on it expect hardcoded low interrupt numbers. However
currently the expected low range interrupt numbers are not exempted from
the dynamic allocation, which leads to confliction when registering LPC
interrupts in the fixed range.

Override arch_dynirq_lower_bound() to reserve these low range interrupt
numbers and prevent them from being dynamically allocated.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
---
 arch/mips/loongson64/init.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
index 5f73f8663ab2d..c7cc5a3d7817f 100644
--- a/arch/mips/loongson64/init.c
+++ b/arch/mips/loongson64/init.c
@@ -7,6 +7,7 @@
 #include <linux/irqchip.h>
 #include <linux/logic_pio.h>
 #include <linux/memblock.h>
+#include <linux/minmax.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <asm/bootinfo.h>
@@ -227,3 +228,8 @@ void __init arch_init_irq(void)
 	reserve_pio_range();
 	irqchip_init();
 }
+
+unsigned int arch_dynirq_lower_bound(unsigned int from)
+{
+	return MAX(from, NR_IRQS_LEGACY);
+}
-- 
2.52.0

On Sat, 21 Mar 2026, at 9:20 AM, Icenowy Zheng wrote:
> On some Loongson 3A devices, a LPC bus is present and some legacy
> devices (e.g. 8259) on it expect hardcoded low interrupt numbers. However
> currently the expected low range interrupt numbers are not exempted from
> the dynamic allocation, which leads to confliction when registering LPC
> interrupts in the fixed range.
>
> Override arch_dynirq_lower_bound() to reserve these low range interrupt
> numbers and prevent them from being dynamically allocated.
>
> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>

Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

@Thomas Bogendoerfer, do you mind picking this over MIPS tree?

Thanks
Jiaxun

> ---
>  arch/mips/loongson64/init.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
> index 5f73f8663ab2d..c7cc5a3d7817f 100644
> --- a/arch/mips/loongson64/init.c
> +++ b/arch/mips/loongson64/init.c
> @@ -7,6 +7,7 @@
>  #include <linux/irqchip.h>
>  #include <linux/logic_pio.h>
>  #include <linux/memblock.h>
> +#include <linux/minmax.h>
>  #include <linux/of.h>
>  #include <linux/of_address.h>
>  #include <asm/bootinfo.h>
> @@ -227,3 +228,8 @@ void __init arch_init_irq(void)
>  	reserve_pio_range();
>  	irqchip_init();
>  }
> +
> +unsigned int arch_dynirq_lower_bound(unsigned int from)
> +{
> +	return MAX(from, NR_IRQS_LEGACY);
> +}
> -- 
> 2.52.0

-- 
- Jiaxun

On Thu, Mar 26, 2026 at 09:40:09PM +0000, Jiaxun Yang wrote:
> 
> 
> On Sat, 21 Mar 2026, at 9:20 AM, Icenowy Zheng wrote:
> > On some Loongson 3A devices, a LPC bus is present and some legacy
> > devices (e.g. 8259) on it expect hardcoded low interrupt numbers. However
> > currently the expected low range interrupt numbers are not exempted from
> > the dynamic allocation, which leads to confliction when registering LPC
> > interrupts in the fixed range.
> >
> > Override arch_dynirq_lower_bound() to reserve these low range interrupt
> > numbers and prevent them from being dynamically allocated.
> >
> > Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
> 
> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> 
> @Thomas Bogendoerfer, do you mind picking this over MIPS tree?

https://lore.kernel.org/all/177453852024.1647592.16054697624437632741.tip-bot2@tip-bot2/

IMHO this in tip tree already

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

The following commit has been merged into the irq/drivers branch of tip:

Commit-ID:     57c9c7bf52c8473a6b9b7fa3547b468c0a91bc60
Gitweb:        https://git.kernel.org/tip/57c9c7bf52c8473a6b9b7fa3547b468c0a91bc60
Author:        Icenowy Zheng <zhengxingda@iscas.ac.cn>
AuthorDate:    Sat, 21 Mar 2026 17:20:27 +08:00
Committer:     Thomas Gleixner <tglx@kernel.org>
CommitterDate: Thu, 26 Mar 2026 16:15:02 +01:00

MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs

On some Loongson 3A devices, a LPC bus is present and some legacy devices
(e.g. 8259) on it expect hardcoded low interrupt numbers. However currently
the expected low range interrupt numbers are not exempted from the dynamic
allocation, which leads to conflicts when registering LPC interrupts in the
fixed range.

Override arch_dynirq_lower_bound() to reserve these low range interrupt
numbers and prevent them from being dynamically allocated.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Link: https://patch.msgid.link/20260321092032.3502701-2-zhengxingda@iscas.ac.cn
---
 arch/mips/loongson64/init.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
index 5f73f86..c7cc5a3 100644
--- a/arch/mips/loongson64/init.c
+++ b/arch/mips/loongson64/init.c
@@ -7,6 +7,7 @@
 #include <linux/irqchip.h>
 #include <linux/logic_pio.h>
 #include <linux/memblock.h>
+#include <linux/minmax.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <asm/bootinfo.h>
@@ -227,3 +228,8 @@ void __init arch_init_irq(void)
 	reserve_pio_range();
 	irqchip_init();
 }
+
+unsigned int arch_dynirq_lower_bound(unsigned int from)
+{
+	return MAX(from, NR_IRQS_LEGACY);
+}