For the whole series:
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
On Sat, Mar 21, 2026 at 5:20 PM Icenowy Zheng <zhengxingda@iscas.ac.cn> wrote:
>
> From: Icenowy Zheng <uwu@icenowy.me>
>
> This patchset tries to add support for Loongson 7A1000 PCH's LPC
> interrupt controller to MIPS-based Loongson systems.
>
> LPC, from software's perspective of view, is just ISA, so the interrupts
> should be handled as legacy ones occupying the lowest 0-15 IRQ numbers.
> Despite the current PCH LPC driver for ACPI-based LoongArch Loongson
> machines handled it, the setup is fragile and depends on its specific
> setup sequence (allocating the LPC IRQs first, and then allocate the
> parent IRQ at PCH PIC). The refactor of extracting parent IRQ allocation
> breaks this fragile sequence, so the first two commits is created to
> address this issue (by reserving ISA interrupts from the dynamic
> allocation space).
>
> Then the remaining commits are just adding OF(DT) based initialization
> of PCH LPC interrupt controller, like what happened on PCH PIC.
>
> Tested on a Haier Boyue G51 system with legacy i8042 keyboard/mouse as
> integrated ones, with some additional patches adding the PCH LPC device
> node to the ls7a-pch.dtsi file.
>
> Changes in v4:
> - Removed "IRQ" acronym from detailed commit messages (but still kept
> in summary phrases for the length constraint).
> - Re-format some patch to utilize 100 columns instead of 80.
> - Temporarily removed the DT patches for fitting the whole patchset into
> the irqchip tree.
>
> Changes in v3:
> - Override arch_dynirq_lower_bound() in MIPS Loongson64 / LoongArch
> instead of modifying the global version of function.
> - Added Rob's R-b to the binding patch.
>
> Changes in v2:
> - Rebased on top of `irq-drivers-2026-02-09` tag.
> - Compatible changed to `loongson,ls7a-lpc` .
> - Merged the patch for conditionally build of ACPI code to the patch
> introducing OF code.
> - Sorted function variable definitions.
> - Reworded some commit messages as Thomas Glexiner suggests.
> - Added __init to the LPC irqchip OF initialization code to prevent
> section mismatch.
>
> Icenowy Zheng (6):
> MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs
> LoongArch: Override arch_dynirq_lower_bound to reserve LPC IRQs
> dt-bindings: interrupt-controller: add LS7A PCH LPC
> irqchip/loongson-pch-lpc: Extract non-ACPI-related code from ACPI init
> irqchip/loongson-pch-lpc: Add OF init code
> irqchip/loongson-pch-lpc: Enable building on MIPS Loongson64
>
> .../loongson,pch-lpc.yaml | 52 +++++++++++
> arch/loongarch/kernel/irq.c | 6 ++
> arch/mips/loongson64/init.c | 6 ++
> drivers/irqchip/Kconfig | 1 -
> drivers/irqchip/irq-loongson-pch-lpc.c | 92 +++++++++++++++----
> 5 files changed, 136 insertions(+), 21 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-lpc.yaml
>
> --
> 2.52.0
>
>