Hi Biju,
On Thu, 19 Mar 2026 16:48:28 +0000
Biju <biju.das.au@gmail.com> wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1,
> requires waiting more than 1 msec after deasserting the CMN_RSTB signal
> before the DSI-Tx module is ready. Increase the delay from 1 usec to
> 1 msec by replacing udelay(1) with fsleep(1000).
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
In your first submission, I commented that "...this should be backported
to stable branches (missing Fixes / Cc: stable tags)?" and you answered
with "Agreed, will add fixes/stable tags".
If you still agree, this patch should be #3 in your list, so that it is
easier/straightforward to backport to stable branches.
> ---
> v1->v2:
> * Updated commit header and description.
> ---
> drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index 5020be0f72ac..715872130780 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -807,7 +807,7 @@ static int rzg2l_mipi_dsi_startup(struct rzg2l_mipi_dsi *dsi,
> if (ret < 0)
> goto err_phy;
>
> - udelay(1);
> + fsleep(1000);
> }
>
> return 0;
> --
> 2.43.0
>
>
--
Hugo Villeneuve