From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Use shared reset controls for PCIe power resets to prepare for RZ/V2H(P)
support, where multiple PCIe channels share the same reset line.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 drivers/pci/controller/pcie-rzg3s-host.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c
index bfc210e696ed..c61e011f8302 100644
--- a/drivers/pci/controller/pcie-rzg3s-host.c
+++ b/drivers/pci/controller/pcie-rzg3s-host.c
@@ -1276,9 +1276,9 @@ static int rzg3s_pcie_resets_prepare_and_get(struct rzg3s_pcie_host *host)
 	for (i = 0; i < data->num_cfg_resets; i++)
 		host->cfg_resets[i].id = data->cfg_resets[i];
 
-	ret = devm_reset_control_bulk_get_exclusive(host->dev,
-						    data->num_power_resets,
-						    host->power_resets);
+	ret = devm_reset_control_bulk_get_shared(host->dev,
+						 data->num_power_resets,
+						 host->power_resets);
 	if (ret)
 		return ret;
 
-- 
2.53.0

On Wed, Mar 18, 2026 at 12:44:48PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Use shared reset controls for PCIe power resets to prepare for RZ/V2H(P)
> support, where multiple PCIe channels share the same reset line.

What is a "PCIe channel"?  Please use PCIe spec terminology if
possible.

> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  drivers/pci/controller/pcie-rzg3s-host.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c
> index bfc210e696ed..c61e011f8302 100644
> --- a/drivers/pci/controller/pcie-rzg3s-host.c
> +++ b/drivers/pci/controller/pcie-rzg3s-host.c
> @@ -1276,9 +1276,9 @@ static int rzg3s_pcie_resets_prepare_and_get(struct rzg3s_pcie_host *host)
>  	for (i = 0; i < data->num_cfg_resets; i++)
>  		host->cfg_resets[i].id = data->cfg_resets[i];
>  
> -	ret = devm_reset_control_bulk_get_exclusive(host->dev,
> -						    data->num_power_resets,
> -						    host->power_resets);
> +	ret = devm_reset_control_bulk_get_shared(host->dev,
> +						 data->num_power_resets,
> +						 host->power_resets);
>  	if (ret)
>  		return ret;
>  
> -- 
> 2.53.0
>

Hi Bjorn,

Thank you for the review.

On Wed, Mar 18, 2026 at 4:30 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> On Wed, Mar 18, 2026 at 12:44:48PM +0000, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Use shared reset controls for PCIe power resets to prepare for RZ/V2H(P)
> > support, where multiple PCIe channels share the same reset line.
>
> What is a "PCIe channel"?  Please use PCIe spec terminology if
> possible.
>
This refers to multiple PCIe controllers (Root Ports) sharing the same
reset line. I will update the commit message accordingly in the next
revision.

Cheers,
Prabhakar