cxl/hdm: Add support for 32 switch decoders

[PATCH] cxl/hdm: Add support for 32 switch decoders

Posted by Li Ming 2 weeks, 5 days ago

Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
support 32 HDM decoders. Current implementation misses some decoders on
CXL host bridge and switch in the case that the value of Decoder Count
field in CXL HDM decoder Capability Register is greater than or equal to
9.

Update calculation implementation to ensure the decoder count calculation
is correct for CXL host bridge/switch ports.

Signed-off-by: Li Ming <ming.li@zohomail.com>
---
 drivers/cxl/cxl.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 9b947286eb9b..466b8eeefed7 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -77,7 +77,12 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
 {
 	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
 
-	return val ? val * 2 : 1;
+	if (!val)
+		return 1;
+	else if (val <= 8)
+		return val * 2;
+	else
+		return 4 * (val - 4);
 }
 
 /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */

---
base-commit: f338e77383789c0cae23ca3d48adcc5e9e137e3c
change-id: 20260318-add_support_for_32_decoders-4a7c77949a41

Best regards,
-- 
Li Ming <ming.li@zohomail.com>

Re: [PATCH] cxl/hdm: Add support for 32 switch decoders

Posted by Dave Jiang 2 weeks, 5 days ago


On 3/18/26 6:00 AM, Li Ming wrote:
> Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
> support 32 HDM decoders. Current implementation misses some decoders on
> CXL host bridge and switch in the case that the value of Decoder Count
> field in CXL HDM decoder Capability Register is greater than or equal to
> 9.
> 
> Update calculation implementation to ensure the decoder count calculation
> is correct for CXL host bridge/switch ports.
> 
> Signed-off-by: Li Ming <ming.li@zohomail.com>
> ---
>  drivers/cxl/cxl.h | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 9b947286eb9b..466b8eeefed7 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -77,7 +77,12 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>  {
>  	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
>  
> -	return val ? val * 2 : 1;
> +	if (!val)
> +		return 1;
> +	else if (val <= 8)
> +		return val * 2;
> +	else
> +		return 4 * (val - 4);

That looks a bit messy. How about:

switch (val) {
case 0:
	return 1;
case 1..8:
	return val * 2;
case 9..12:
	return val 4 * (val - 4);
default:
	return -ENXIO;
}

DJ

>  }
>  
>  /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
> 
> ---
> base-commit: f338e77383789c0cae23ca3d48adcc5e9e137e3c
> change-id: 20260318-add_support_for_32_decoders-4a7c77949a41
> 
> Best regards,

Re: [PATCH] cxl/hdm: Add support for 32 switch decoders

Posted by Li Ming 2 weeks, 4 days ago

在 2026/3/18 23:40, Dave Jiang 写道:
>
> On 3/18/26 6:00 AM, Li Ming wrote:
>> Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
>> support 32 HDM decoders. Current implementation misses some decoders on
>> CXL host bridge and switch in the case that the value of Decoder Count
>> field in CXL HDM decoder Capability Register is greater than or equal to
>> 9.
>>
>> Update calculation implementation to ensure the decoder count calculation
>> is correct for CXL host bridge/switch ports.
>>
>> Signed-off-by: Li Ming <ming.li@zohomail.com>
>> ---
>>   drivers/cxl/cxl.h | 7 ++++++-
>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
>> index 9b947286eb9b..466b8eeefed7 100644
>> --- a/drivers/cxl/cxl.h
>> +++ b/drivers/cxl/cxl.h
>> @@ -77,7 +77,12 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>>   {
>>   	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
>>   
>> -	return val ? val * 2 : 1;
>> +	if (!val)
>> +		return 1;
>> +	else if (val <= 8)
>> +		return val * 2;
>> +	else
>> +		return 4 * (val - 4);
> That looks a bit messy. How about:
>
> switch (val) {
> case 0:
> 	return 1;
> case 1..8:
> 	return val * 2;
> case 9..12:
> 	return val 4 * (val - 4);
> default:
> 	return -ENXIO;
> }
>
> DJ

Sure, will do that in v2.


Ming

Re: [PATCH] cxl/hdm: Add support for 32 switch decoders

Posted by Alison Schofield 2 weeks, 3 days ago

On Thu, Mar 19, 2026 at 07:11:34PM +0800, Li Ming wrote:
> 
> 在 2026/3/18 23:40, Dave Jiang 写道:
> > 
> > On 3/18/26 6:00 AM, Li Ming wrote:
> > > Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
> > > support 32 HDM decoders. Current implementation misses some decoders on
> > > CXL host bridge and switch in the case that the value of Decoder Count
> > > field in CXL HDM decoder Capability Register is greater than or equal to
> > > 9.
> > > 
> > > Update calculation implementation to ensure the decoder count calculation
> > > is correct for CXL host bridge/switch ports.
> > > 
> > > Signed-off-by: Li Ming <ming.li@zohomail.com>
> > > ---
> > >   drivers/cxl/cxl.h | 7 ++++++-
> > >   1 file changed, 6 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> > > index 9b947286eb9b..466b8eeefed7 100644
> > > --- a/drivers/cxl/cxl.h
> > > +++ b/drivers/cxl/cxl.h
> > > @@ -77,7 +77,12 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
> > >   {
> > >   	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
> > > -	return val ? val * 2 : 1;
> > > +	if (!val)
> > > +		return 1;
> > > +	else if (val <= 8)
> > > +		return val * 2;
> > > +	else
> > > +		return 4 * (val - 4);
> > That looks a bit messy. How about:
> > 
> > switch (val) {
> > case 0:
> > 	return 1;
> > case 1..8:
> > 	return val * 2;
> > case 9..12:
> > 	return val 4 * (val - 4);
> > default:
> > 	return -ENXIO;
> > }
> > 
> > DJ
> 
> Sure, will do that in v2.

Hi Ming,

You may have already spied this while implementing. Before this change
this function could only return 1 or val*2, so never negative. Adding
-ENXIO changes that and could wrap to huge value in the decoder for
loops. Change decoder_count field to int to clean that up.

Or, you could do something like this:
	WARN_ONCE(1, "reserved HDM decoder count field: %d\n", val);
        return 0;

I like the ENXIO and type cleanup or maybe you have something else?

--Alison

> 
> 
> Ming
>

Re: [PATCH] cxl/hdm: Add support for 32 switch decoders

Posted by Li Ming 2 weeks, 3 days ago

在 2026/3/20 10:03, Alison Schofield 写道:
> On Thu, Mar 19, 2026 at 07:11:34PM +0800, Li Ming wrote:
>> 在 2026/3/18 23:40, Dave Jiang 写道:
>>> On 3/18/26 6:00 AM, Li Ming wrote:
>>>> Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
>>>> support 32 HDM decoders. Current implementation misses some decoders on
>>>> CXL host bridge and switch in the case that the value of Decoder Count
>>>> field in CXL HDM decoder Capability Register is greater than or equal to
>>>> 9.
>>>>
>>>> Update calculation implementation to ensure the decoder count calculation
>>>> is correct for CXL host bridge/switch ports.
>>>>
>>>> Signed-off-by: Li Ming <ming.li@zohomail.com>
>>>> ---
>>>>    drivers/cxl/cxl.h | 7 ++++++-
>>>>    1 file changed, 6 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
>>>> index 9b947286eb9b..466b8eeefed7 100644
>>>> --- a/drivers/cxl/cxl.h
>>>> +++ b/drivers/cxl/cxl.h
>>>> @@ -77,7 +77,12 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>>>>    {
>>>>    	int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
>>>> -	return val ? val * 2 : 1;
>>>> +	if (!val)
>>>> +		return 1;
>>>> +	else if (val <= 8)
>>>> +		return val * 2;
>>>> +	else
>>>> +		return 4 * (val - 4);
>>> That looks a bit messy. How about:
>>>
>>> switch (val) {
>>> case 0:
>>> 	return 1;
>>> case 1..8:
>>> 	return val * 2;
>>> case 9..12:
>>> 	return val 4 * (val - 4);
>>> default:
>>> 	return -ENXIO;
>>> }
>>>
>>> DJ
>> Sure, will do that in v2.
> Hi Ming,
>
> You may have already spied this while implementing. Before this change
> this function could only return 1 or val*2, so never negative. Adding
> -ENXIO changes that and could wrap to huge value in the decoder for
> loops. Change decoder_count field to int to clean that up.
>
> Or, you could do something like this:
> 	WARN_ONCE(1, "reserved HDM decoder count field: %d\n", val);
>          return 0;
>
> I like the ENXIO and type cleanup or maybe you have something else?
>
> --Alison
>
Hi Alison,

I considered returnning 0 before, but both Dave and you prefer 
returnning ENXIO solution, I will do that in V2.


Ming