[v2] tools/nolibc: MIPS: fix clobbers of 'lo' and 'hi' registers on different ISAs

[PATCH v2] tools/nolibc: MIPS: fix clobbers of 'lo' and 'hi' registers on different ISAs

Posted by Thomas Weißschuh 2 weeks, 2 days ago

All MIPS ISAs before r6 use the 'lo' and 'hi' special registers.
These are clobbered by system calls and need to be marked as such to
avoid miscompilations. Currently nolibc ties the clobbers to the ABI.
But this is wrong and leads to ISA<->ABI combinations which are not
handled correctly, leading to compiler errors or miscompilations.

Handle all different combinations of ABI and ISA.

Fixes: a6a2a8a42972 ("tools/nolibc: MIPS: add support for N64 and N32 ABIs")
Fixes: 66b6f755ad45 ("rcutorture: Import a copy of nolibc")
Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
Link: https://lore.kernel.org/lkml/alpine.DEB.2.21.2603141744240.55200@angie.orcam.me.uk/
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
---
Changes in v2:
- Reword commit message.
- Simplify the logic.
- Link to v1: https://lore.kernel.org/r/20260218-nolibc-mips-clobber-v1-1-f71009a00c90@linutronix.de
---
 tools/include/nolibc/arch-mips.h | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/tools/include/nolibc/arch-mips.h b/tools/include/nolibc/arch-mips.h
index a72506ceec6b..f8fcd58658d5 100644
--- a/tools/include/nolibc/arch-mips.h
+++ b/tools/include/nolibc/arch-mips.h
@@ -39,11 +39,19 @@
  *   - stack is 16-byte aligned
  */
 
+#if __mips_isa_rev < 6
+#define _NOLIBC_SYSCALL_CLOBBER_HI_LO "hi", "lo"
+#else
+#define _NOLIBC_SYSCALL_CLOBBER_HI_LO "$0"
+#endif
+
 #if defined(_ABIO32)
 
 #define _NOLIBC_SYSCALL_CLOBBERLIST \
-	"memory", "cc", "at", "v1", "hi", "lo", \
-	"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9"
+	"memory", "cc", "at", "v1", \
+	"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9", \
+	_NOLIBC_SYSCALL_CLOBBER_HI_LO
+
 #define _NOLIBC_SYSCALL_STACK_RESERVE "addiu $sp, $sp, -32\n"
 #define _NOLIBC_SYSCALL_STACK_UNRESERVE "addiu $sp, $sp, 32\n"
 
@@ -52,7 +60,8 @@
 /* binutils, GCC and clang disagree about register aliases, use numbers instead. */
 #define _NOLIBC_SYSCALL_CLOBBERLIST \
 	"memory", "cc", "at", "v1", \
-	"10", "11", "12", "13", "14", "15", "24", "25"
+	"10", "11", "12", "13", "14", "15", "24", "25", \
+	_NOLIBC_SYSCALL_CLOBBER_HI_LO
 
 #define _NOLIBC_SYSCALL_STACK_RESERVE
 #define _NOLIBC_SYSCALL_STACK_UNRESERVE

---
base-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f
change-id: 20260218-nolibc-mips-clobber-499e9fbdb5bf

Best regards,
-- 
Thomas Weißschuh <thomas.weissschuh@linutronix.de>

Re: [PATCH v2] tools/nolibc: MIPS: fix clobbers of 'lo' and 'hi' registers on different ISAs

Posted by Willy Tarreau 1 week, 4 days ago

On Tue, Mar 17, 2026 at 09:40:36AM +0100, Thomas Weißschuh wrote:
> All MIPS ISAs before r6 use the 'lo' and 'hi' special registers.
> These are clobbered by system calls and need to be marked as such to
> avoid miscompilations. Currently nolibc ties the clobbers to the ABI.
> But this is wrong and leads to ISA<->ABI combinations which are not
> handled correctly, leading to compiler errors or miscompilations.
> 
> Handle all different combinations of ABI and ISA.
> 
> Fixes: a6a2a8a42972 ("tools/nolibc: MIPS: add support for N64 and N32 ABIs")
> Fixes: 66b6f755ad45 ("rcutorture: Import a copy of nolibc")
> Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
> Link: https://lore.kernel.org/lkml/alpine.DEB.2.21.2603141744240.55200@angie.orcam.me.uk/
> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>

Looks clean, thank you Thomas & Maciej!

Acked-by: Willy Tarreau <w@1wt.eu>

Willy