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[PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC

Yixun Lan posted 3 patches 2 weeks, 6 days ago
There is a newer version of this series
[PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Yixun Lan 2 weeks, 6 days ago 
Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
USB2.0 functionality, and requires only one USB2.0 PHY connected.

Explicitly reduce number of phy property to minimal one.

Signed-off-by: Yixun Lan <dlan@kernel.org>
---
 Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
index 0f0b5e061ca1..cc27b363ca79 100644
--- a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
@@ -27,7 +27,9 @@ allOf:
 
 properties:
   compatible:
-    const: spacemit,k1-dwc3
+    enum:
+      - spacemit,k1-dwc3
+      - spacemit,k3-dwc3
 
   reg:
     maxItems: 1
@@ -42,11 +44,13 @@ properties:
     maxItems: 1
 
   phys:
+    minItems: 1
     items:
       - description: phandle to USB2/HS PHY
       - description: phandle to USB3/SS PHY
 
   phy-names:
+    minItems: 1
     items:
       - const: usb2-phy
       - const: usb3-phy

-- 
2.53.0
Re: [PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Conor Dooley 2 weeks, 6 days ago 
On Tue, Mar 17, 2026 at 11:53:02AM +0000, Yixun Lan wrote:
> Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
> The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
> USB2.0 functionality, and requires only one USB2.0 PHY connected.
> 
> Explicitly reduce number of phy property to minimal one.

Is this valid for the existing compatible, will it work with only one
clock?

> 
> Signed-off-by: Yixun Lan <dlan@kernel.org>
> ---
>  Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> index 0f0b5e061ca1..cc27b363ca79 100644
> --- a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> @@ -27,7 +27,9 @@ allOf:
>  
>  properties:
>    compatible:
> -    const: spacemit,k1-dwc3
> +    enum:
> +      - spacemit,k1-dwc3
> +      - spacemit,k3-dwc3
>  
>    reg:
>      maxItems: 1
> @@ -42,11 +44,13 @@ properties:
>      maxItems: 1
>  
>    phys:
> +    minItems: 1
>      items:
>        - description: phandle to USB2/HS PHY
>        - description: phandle to USB3/SS PHY
>  
>    phy-names:
> +    minItems: 1
>      items:
>        - const: usb2-phy
>        - const: usb3-phy
> 
> -- 
> 2.53.0
>
Re: [PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Yixun Lan 2 weeks, 6 days ago 
Hi Conor,

On 12:55 Tue 17 Mar     , Conor Dooley wrote:
> On Tue, Mar 17, 2026 at 11:53:02AM +0000, Yixun Lan wrote:
> > Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
> > The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
> > USB2.0 functionality, and requires only one USB2.0 PHY connected.
> > 
> > Explicitly reduce number of phy property to minimal one.
> 
> Is this valid for the existing compatible, will it work with only one
> clock?
> 
I didn't change clock binding, do you mean phy?

Both k1 and k3 work with one clock (no change here)

for phy, the existing k1 requires two. for k3, one controller requires
one phy due to only has USB2.0 support, other controllers requires two
phys - USB2, USB3 PHY

> > 
> > Signed-off-by: Yixun Lan <dlan@kernel.org>
> > ---
> >  Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> > index 0f0b5e061ca1..cc27b363ca79 100644
> > --- a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> > +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> > @@ -27,7 +27,9 @@ allOf:
> >  
> >  properties:
> >    compatible:
> > -    const: spacemit,k1-dwc3
> > +    enum:
> > +      - spacemit,k1-dwc3
> > +      - spacemit,k3-dwc3
> >  
> >    reg:
> >      maxItems: 1
> > @@ -42,11 +44,13 @@ properties:
> >      maxItems: 1
> >  
> >    phys:
> > +    minItems: 1
> >      items:
> >        - description: phandle to USB2/HS PHY
> >        - description: phandle to USB3/SS PHY
> >  
> >    phy-names:
> > +    minItems: 1
> >      items:
> >        - const: usb2-phy
> >        - const: usb3-phy
> > 
> > -- 
> > 2.53.0
> > 



-- 
Yixun Lan (dlan)
Re: [PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Conor Dooley 2 weeks, 5 days ago 
On Wed, Mar 18, 2026 at 05:44:35AM +0800, Yixun Lan wrote:
> Hi Conor,
> 
> On 12:55 Tue 17 Mar     , Conor Dooley wrote:
> > On Tue, Mar 17, 2026 at 11:53:02AM +0000, Yixun Lan wrote:
> > > Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
> > > The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
> > > USB2.0 functionality, and requires only one USB2.0 PHY connected.
> > > 
> > > Explicitly reduce number of phy property to minimal one.
> > 
> > Is this valid for the existing compatible, will it work with only one
> > clock?
> > 
> I didn't change clock binding, do you mean phy?
> 
> Both k1 and k3 work with one clock (no change here)
> 
> for phy, the existing k1 requires two. for k3, one controller requires
> one phy due to only has USB2.0 support, other controllers requires two
> phys - USB2, USB3 PHY

Yep, phy is what I meant. Sorry bout that. Since you're relaxing the
constraints for the k1, can you please add a conditional section to the
binding to enforce 2 phys min for k1?

> 
> > > 
> > > Signed-off-by: Yixun Lan <dlan@kernel.org>
> > > ---
> > >  Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 6 +++++-
> > >  1 file changed, 5 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> > > index 0f0b5e061ca1..cc27b363ca79 100644
> > > --- a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> > > +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml
> > > @@ -27,7 +27,9 @@ allOf:
> > >  
> > >  properties:
> > >    compatible:
> > > -    const: spacemit,k1-dwc3
> > > +    enum:
> > > +      - spacemit,k1-dwc3
> > > +      - spacemit,k3-dwc3
> > >  
> > >    reg:
> > >      maxItems: 1
> > > @@ -42,11 +44,13 @@ properties:
> > >      maxItems: 1
> > >  
> > >    phys:
> > > +    minItems: 1
> > >      items:
> > >        - description: phandle to USB2/HS PHY
> > >        - description: phandle to USB3/SS PHY
> > >  
> > >    phy-names:
> > > +    minItems: 1
> > >      items:
> > >        - const: usb2-phy
> > >        - const: usb3-phy
> > > 
> > > -- 
> > > 2.53.0
> > > 
> 
> 
> 
> -- 
> Yixun Lan (dlan)
Re: [PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Yixun Lan 2 weeks, 4 days ago 
Hi Conor,

On 17:21 Wed 18 Mar     , Conor Dooley wrote:
> On Wed, Mar 18, 2026 at 05:44:35AM +0800, Yixun Lan wrote:
> > Hi Conor,
> > 
> > On 12:55 Tue 17 Mar     , Conor Dooley wrote:
> > > On Tue, Mar 17, 2026 at 11:53:02AM +0000, Yixun Lan wrote:
> > > > Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
> > > > The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
> > > > USB2.0 functionality, and requires only one USB2.0 PHY connected.
> > > > 
> > > > Explicitly reduce number of phy property to minimal one.
> > > 
> > > Is this valid for the existing compatible, will it work with only one
> > > clock?
> > > 
> > I didn't change clock binding, do you mean phy?
> > 
> > Both k1 and k3 work with one clock (no change here)
> > 
> > for phy, the existing k1 requires two. for k3, one controller requires
> > one phy due to only has USB2.0 support, other controllers requires two
> > phys - USB2, USB3 PHY
> 
> Yep, phy is what I meant. Sorry bout that. Since you're relaxing the
> constraints for the k1, can you please add a conditional section to the
> binding to enforce 2 phys min for k1?
> 

To be explicit, the change should be applied to both K1 and K3, even in K1
use case, it's perfectly fine for designer to choose enabling USB2.0
only, and leave the comb phy to pcie contoller, so only one phy required

While revisiting the DT file, the phy related property should be moved
to board level, but this is another thing we should fix..

-- 
Yixun Lan (dlan)
Re: [PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Conor Dooley 2 weeks, 4 days ago 
On Thu, Mar 19, 2026 at 10:41:24AM +0800, Yixun Lan wrote:
> Hi Conor,
> 
> On 17:21 Wed 18 Mar     , Conor Dooley wrote:
> > On Wed, Mar 18, 2026 at 05:44:35AM +0800, Yixun Lan wrote:
> > > Hi Conor,
> > > 
> > > On 12:55 Tue 17 Mar     , Conor Dooley wrote:
> > > > On Tue, Mar 17, 2026 at 11:53:02AM +0000, Yixun Lan wrote:
> > > > > Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
> > > > > The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
> > > > > USB2.0 functionality, and requires only one USB2.0 PHY connected.
> > > > > 
> > > > > Explicitly reduce number of phy property to minimal one.
> > > > 
> > > > Is this valid for the existing compatible, will it work with only one
> > > > clock?
> > > > 
> > > I didn't change clock binding, do you mean phy?
> > > 
> > > Both k1 and k3 work with one clock (no change here)
> > > 
> > > for phy, the existing k1 requires two. for k3, one controller requires
> > > one phy due to only has USB2.0 support, other controllers requires two
> > > phys - USB2, USB3 PHY
> > 
> > Yep, phy is what I meant. Sorry bout that. Since you're relaxing the
> > constraints for the k1, can you please add a conditional section to the
> > binding to enforce 2 phys min for k1?
> > 
> 
> To be explicit, the change should be applied to both K1 and K3, even in K1
> use case, it's perfectly fine for designer to choose enabling USB2.0
> only, and leave the comb phy to pcie contoller, so only one phy required

In that case, can you be more clear in the commit message about why this
is also being done for the k1 please?
Re: [PATCH 1/3] dt-bindings: usb: dwc3: spacemit: add support for K3 SoC
Posted by Yixun Lan 2 weeks, 3 days ago 
Hi Conor,

On 14:36 Thu 19 Mar     , Conor Dooley wrote:
> On Thu, Mar 19, 2026 at 10:41:24AM +0800, Yixun Lan wrote:
> > Hi Conor,
> > 
> > On 17:21 Wed 18 Mar     , Conor Dooley wrote:
> > > On Wed, Mar 18, 2026 at 05:44:35AM +0800, Yixun Lan wrote:
> > > > Hi Conor,
> > > > 
> > > > On 12:55 Tue 17 Mar     , Conor Dooley wrote:
> > > > > On Tue, Mar 17, 2026 at 11:53:02AM +0000, Yixun Lan wrote:
> > > > > > Add compatible string for DWC3 USB controller found in SpacemiT K3 SoC.
> > > > > > The USB2.0 host controller in K3 SoC actually use DWC3 IP but only has
> > > > > > USB2.0 functionality, and requires only one USB2.0 PHY connected.
> > > > > > 
> > > > > > Explicitly reduce number of phy property to minimal one.
> > > > > 
> > > > > Is this valid for the existing compatible, will it work with only one
> > > > > clock?
> > > > > 
> > > > I didn't change clock binding, do you mean phy?
> > > > 
> > > > Both k1 and k3 work with one clock (no change here)
> > > > 
> > > > for phy, the existing k1 requires two. for k3, one controller requires
> > > > one phy due to only has USB2.0 support, other controllers requires two
> > > > phys - USB2, USB3 PHY
> > > 
> > > Yep, phy is what I meant. Sorry bout that. Since you're relaxing the
> > > constraints for the k1, can you please add a conditional section to the
> > > binding to enforce 2 phys min for k1?
> > > 
> > 
> > To be explicit, the change should be applied to both K1 and K3, even in K1
> > use case, it's perfectly fine for designer to choose enabling USB2.0
> > only, and leave the comb phy to pcie contoller, so only one phy required
> 
> In that case, can you be more clear in the commit message about why this
> is also being done for the k1 please?

sure, I will do it in v2

-- 
Yixun Lan (dlan)

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