Introduce EcoNet EN7528 SoC compatible in MediaTek PCIe controller
binding.
EcoNet PCIe controller has the same configuration model as
Mediatek v2 but is initiallized more similarly to an MT7621
PCIe.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
---
.../bindings/pci/mediatek-pcie.yaml | 82 +++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml
index 0b8c78ec4f91..bac6e3c84752 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml
@@ -14,6 +14,7 @@ properties:
oneOf:
- enum:
- airoha,an7583-pcie
+ - econet,en7528-pcie
- mediatek,mt2712-pcie
- mediatek,mt7622-pcie
- mediatek,mt7629-pcie
@@ -226,6 +227,31 @@ allOf:
mediatek,pbus-csr: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: econet,en7528-pcie
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ reset: false
+
+ reset-names: false
+
+ power-domain: false
+
+ mediatek,pbus-csr: false
+
+ required:
+ - phys
+ - phy-names
+
unevaluatedProperties: false
examples:
@@ -436,3 +462,59 @@ examples:
};
};
};
+
+ # EN7528
+ - |
+ #include <dt-bindings/interrupt-controller/mips-gic.h>
+ #include <dt-bindings/clock/en7523-clk.h>
+ #include <dt-bindings/reset/airoha,en7523-reset.h>
+
+ soc_3 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pcie@1fb81000 {
+ compatible = "econet,en7528-pcie";
+ device_type = "pci";
+ linux,pci-domain = <0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ reg = <0x1fb81000 0x1000>;
+ reg-names = "port0";
+
+ clocks = <&scuclk EN7523_CLK_PCIE>;
+ clock-names = "sys_ck0";
+
+ phys = <&pcie_phy0>;
+ phy-names = "pcie-phy0";
+
+ ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00010000>,
+ <0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <23>;
+ interrupt-names = "pcie_irq";
+ bus-range = <0x00 0xff>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &pcie_intc 0>,
+ <0 0 0 2 &pcie_intc 1>,
+ <0 0 0 3 &pcie_intc 2>,
+ <0 0 0 4 &pcie_intc 3>;
+
+ pcie_intc: interrupt-controller {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ slot0: pcie@0,0 {
+ device_type = "pci";
+ reg = <0x0000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+ };
+ };
--
2.39.5On Mon, Mar 16, 2026 at 03:51:55PM +0000, Caleb James DeLisle wrote:
>
> mediatek,pbus-csr: false
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: econet,en7528-pcie
> + then:
> + properties:
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + maxItems: 1
> +
> + reset: false
> +
> + reset-names: false
> +
> + power-domain: false
Wrong property.
> +
> + mediatek,pbus-csr: false
> +
> + required:
> + - phys
> + - phy-names
> +
> unevaluatedProperties: false
>
> examples:
> @@ -436,3 +462,59 @@ examples:
> };
> };
> };
> +
> + # EN7528
> + - |
> + #include <dt-bindings/interrupt-controller/mips-gic.h>
> + #include <dt-bindings/clock/en7523-clk.h>
> + #include <dt-bindings/reset/airoha,en7523-reset.h>
> +
> + soc_3 {
soc
Underscores are not allowed, but honestly neither soc node is needed nor
the example. There are already 3 examples, it's enough, especially that
there are no new properties here.
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + pcie@1fb81000 {
> + compatible = "econet,en7528-pcie";
> + device_type = "pci";
> + linux,pci-domain = <0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + reg = <0x1fb81000 0x1000>;
> + reg-names = "port0";
> +
> + clocks = <&scuclk EN7523_CLK_PCIE>;
> + clock-names = "sys_ck0";
> +
> + phys = <&pcie_phy0>;
> + phy-names = "pcie-phy0";
> +
> + ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00010000>,
> + <0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <23>;
> + interrupt-names = "pcie_irq";
> + bus-range = <0x00 0xff>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &pcie_intc 0>,
> + <0 0 0 2 &pcie_intc 1>,
> + <0 0 0 3 &pcie_intc 2>,
> + <0 0 0 4 &pcie_intc 3>;
> +
> + pcie_intc: interrupt-controller {
> + interrupt-controller;
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + };
> +
> + slot0: pcie@0,0 {
> + device_type = "pci";
> + reg = <0x0000 0 0 0 0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + };
> + };
> + };
> --
> 2.39.5
>
On 17/03/2026 08:26, Krzysztof Kozlowski wrote:
> On Mon, Mar 16, 2026 at 03:51:55PM +0000, Caleb James DeLisle wrote:
>>
>> mediatek,pbus-csr: false
>>
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: econet,en7528-pcie
>> + then:
>> + properties:
>> + clocks:
>> + maxItems: 1
>> +
>> + clock-names:
>> + maxItems: 1
>> +
>> + reset: false
>> +
>> + reset-names: false
>> +
>> + power-domain: false
> Wrong property.
>
>> +
>> + mediatek,pbus-csr: false
>> +
>> + required:
>> + - phys
>> + - phy-names
>> +
>> unevaluatedProperties: false
>>
>> examples:
>> @@ -436,3 +462,59 @@ examples:
>> };
>> };
>> };
>> +
>> + # EN7528
>> + - |
>> + #include <dt-bindings/interrupt-controller/mips-gic.h>
>> + #include <dt-bindings/clock/en7523-clk.h>
>> + #include <dt-bindings/reset/airoha,en7523-reset.h>
>> +
>> + soc_3 {
> soc
>
> Underscores are not allowed, but honestly neither soc node is needed nor
> the example. There are already 3 examples, it's enough, especially that
> there are no new properties here.
Ok, will remove the example then.
Thanks,
Caleb
>
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + pcie@1fb81000 {
>> + compatible = "econet,en7528-pcie";
>> + device_type = "pci";
>> + linux,pci-domain = <0>;
>> + #address-cells = <3>;
>> + #size-cells = <2>;
>> +
>> + reg = <0x1fb81000 0x1000>;
>> + reg-names = "port0";
>> +
>> + clocks = <&scuclk EN7523_CLK_PCIE>;
>> + clock-names = "sys_ck0";
>> +
>> + phys = <&pcie_phy0>;
>> + phy-names = "pcie-phy0";
>> +
>> + ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00010000>,
>> + <0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
>> +
>> + interrupt-parent = <&intc>;
>> + interrupts = <23>;
>> + interrupt-names = "pcie_irq";
>> + bus-range = <0x00 0xff>;
>> + #interrupt-cells = <1>;
>> + interrupt-map-mask = <0 0 0 7>;
>> + interrupt-map = <0 0 0 1 &pcie_intc 0>,
>> + <0 0 0 2 &pcie_intc 1>,
>> + <0 0 0 3 &pcie_intc 2>,
>> + <0 0 0 4 &pcie_intc 3>;
>> +
>> + pcie_intc: interrupt-controller {
>> + interrupt-controller;
>> + #address-cells = <0>;
>> + #interrupt-cells = <1>;
>> + };
>> +
>> + slot0: pcie@0,0 {
>> + device_type = "pci";
>> + reg = <0x0000 0 0 0 0>;
>> + #address-cells = <3>;
>> + #size-cells = <2>;
>> + ranges;
>> + };
>> + };
>> + };
>> --
>> 2.39.5
>>
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