From: Loic Poulain <loic.poulain@oss.qualcomm.com>
Add device tree support for the Arduino VENTUNO Q board,
based on the Qualcomm QCS8300 (Monaco) SoC.
The board features a Qualcomm Monza SoM and integrates various
peripherals, including:
- USB Type‑C connector with dual‑role support
- ADV7535 DSI‑to‑HDMI bridge
- MAX98091 audio codec
- 2.5G Ethernet PHY (HSGMII)
- PCIe0 (to onboard WiFi chipset and USB bridge)
- PCIe1 (to M2/nvme)
- Button (via GPIO‑keys)
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/monaco-arduino-monza.dts | 466 ++++++++++++++++++
arch/arm64/boot/dts/qcom/monaco.dtsi | 55 +++
3 files changed, 522 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 6d87be639aac..0b26f0dbc6df 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -47,6 +47,7 @@ lemans-evk-el2-dtbs := lemans-evk.dtb lemans-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-el2.dtb
dtb-$(CONFIG_ARCH_QCOM) += milos-fairphone-fp6.dtb
dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb
+dtb-$(CONFIG_ARCH_QCOM) += monaco-arduino-monza.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb
diff --git a/arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts b/arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts
new file mode 100644
index 000000000000..ca14f0ea4dae
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts
@@ -0,0 +1,466 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
+
+#include "monaco.dtsi"
+#include "monaco-pmics.dtsi"
+#include "monaco-monza-som.dtsi"
+
+/ {
+ model = "Arduino VENTUNO Q";
+ compatible = "arduino,monza", "qcom,qcs8300";
+
+ aliases {
+ ethernet0 = ðernet0;
+ i2c1 = &i2c1;
+ serial0 = &uart7;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&gpio_keys_default>;
+ pinctrl-names = "default";
+
+ button-home {
+ label = "Home Key";
+ linux,code = <KEY_HOMEPAGE>;
+ gpios = <&tlmm 79 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&adv7535_out>;
+ };
+ };
+ };
+
+ sound {
+ compatible = "qcom,qcs8275-sndcard";
+ model = "arduino-monza";
+ audio-routing = "IN12", "Headset Mic12",
+ "Headset Mic12", "MICBIAS",
+ "IN56", "Headset Mic56",
+ "Headset Mic56", "MICBIAS",
+ "MIC1", "MICBIAS",
+ "Headphone", "HPL",
+ "Headphone", "HPR",
+ "Receiver", "RCVL",
+ "Receiver", "RCVR",
+ "Speaker", "SPKL",
+ "Speaker", "SPKR";
+
+ pinctrl-0 = <&quad_mi2s_active>, <&quad_mclk_active>, <&lpi_i2s4_active>;
+ pinctrl-names = "default";
+
+ pri-i2s-playback-dai-link {
+ link-name = "Analog Playback";
+
+ codec {
+ sound-dai = <&max98091>;
+ };
+
+ cpu {
+ sound-dai = <&q6apmbedai 137>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ pri-i2s-capture-dai-link {
+ link-name = "Analog Capture";
+
+ codec {
+ sound-dai = <&max98091>;
+ };
+
+ cpu {
+ sound-dai = <&q6apmbedai 138>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ hdmi-mi2s-playback-dai-link {
+ link-name = "HDMI Playback";
+
+ codec {
+ sound-dai = <&adv7535>;
+ };
+
+ cpu {
+ sound-dai = <&q6apmbedai 145>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+ };
+
+ vdc_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdc_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdc_1v8: regulator-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vdc_5v: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdc_5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ startup-delay-us = <20000>;
+ };
+
+ vreg_nvme: regulator-3p3-m2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_m2_3p3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ startup-delay-us = <20000>;
+ };
+};
+
+ðernet0 {
+ phy-mode = "2500base-x";
+ phy-handle = <&hsgmii_phy0>;
+
+ pinctrl-0 = <ðernet0_default>;
+ pinctrl-names = "default";
+
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hsgmii_phy0: ethernet-phy@1c {
+ compatible = "ethernet-phy-id004d.d101";
+ reg = <0x1c>;
+ reset-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <70000>;
+ };
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <4>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,route-up;
+ snps,priority = <0x1>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x1>;
+ snps,route-ptp;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x2>;
+ snps,route-avcp;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x3>;
+ snps,priority = <0xc>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <4>;
+
+ queue0 {
+ snps,dcb-algorithm;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+ };
+};
+
+&i2c12 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ max98091: audio-codec@10 {
+ compatible = "maxim,max98091";
+ reg = <0x10>;
+ pinctrl-0 = <&max98091_default>;
+ pinctrl-names = "default";
+ interrupts-extended = <&tlmm 16 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_16 */
+ clocks = <&q6prmcc LPASS_CLK_ID_MCLK_3 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ };
+
+ adv7535: bridge@3d {
+ compatible = "adi,adv7535";
+ reg = <0x3d>;
+ pinctrl-0 = <&adv7535_default>;
+ pinctrl-names = "default";
+ interrupts-extended = <&tlmm 93 IRQ_TYPE_EDGE_FALLING>;
+ avdd-supply = <&vdc_1v8>;
+ dvdd-supply = <&vdc_1v8>;
+ pvdd-supply = <&vdc_1v8>;
+ a2vdd-supply = <&vdc_1v8>;
+ v3p3-supply = <&vdc_3v3>;
+ v1p2-supply = <&vdc_1v8>;
+ adi,dsi-lanes = <4>;
+ #sound-dai-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7535_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7535_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dp0 {
+ status = "okay";
+};
+
+&mdss_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+};
+
+&mdss_dp0_phy {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ status = "okay";
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&adv7535_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ pinctrl-0 = <&pcie0_default_state>;
+ pinctrl-names = "default";
+
+ vddpe-3v3-supply = <&vdc_3v3>;
+};
+
+&pcie1 {
+ pinctrl-0 = <&pcie1_default_state>;
+ pinctrl-names = "default";
+
+ vddpe-3v3-supply = <&vreg_nvme>;
+};
+
+&pcieport0 {
+ reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+
+ pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ bus-range = <0x01 0xff>;
+ ranges;
+ reg = <0x010000 0x00 0x00 0x00 0x00>;
+
+ pci@2,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ bus-range = <0x00 0xff>;
+ ranges;
+ reg = <0x021000 0x00 0x00 0x00 0x00>;
+
+ usb@0 {
+ compatible = "pci104c,8241";
+ reg = <0 0 0 0 0>;
+ ti,pwron-active-high;
+ };
+ };
+ };
+};
+
+&pcieport1 {
+ reset-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
+};
+
+&tlmm {
+ pcie0_default_state: pcie0-default-state {
+ wake-pins {
+ pins = "gpio0";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ clkreq-pins {
+ pins = "gpio1";
+ function = "pcie0_clkreq";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-pins {
+ pins = "gpio2";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ ethernet0_default: ethernet0-default-state {
+ ethernet0_mdc: ethernet0-mdc-pins {
+ pins = "gpio5";
+ function = "emac0_mdc";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ ethernet0_mdio: ethernet0-mdio-pins {
+ pins = "gpio6";
+ function = "emac0_mdio";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+ max98091_default: max98091-default-state {
+ pins = "gpio16";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ pcie1_default_state: pcie1-default-state {
+ wake-pins {
+ pins = "gpio21";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ clkreq-pins {
+ pins = "gpio22";
+ function = "pcie1_clkreq";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ perst-pins {
+ pins = "gpio23";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ gpio_keys_default: gpio-keys-default-state {
+ pins = "gpio79";
+ function = "gpio";
+ bias-disable;
+ };
+
+ adv7535_default: adv7535-default-state {
+ pins = "gpio93";
+ function = "gpio";
+ bias-pull-up;
+ };
+};
+
+&uart7 {
+ status = "okay";
+};
+
+&usb_1 {
+ status = "okay";
+};
+
+/* Internally connected to the MCU (e.g. for DFU). */
+&usb_2 {
+ dr_mode = "host";
+
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 53cbc08d4df4..837adf569485 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -2885,6 +2885,61 @@ lpass_tlmm: pinctrl@3440000 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 23>;
+
+ quad_mclk_active: quad-mclk-state {
+ clk-pins {
+ pins = "gpio5";
+ function = "ext_mclk1_c";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ quad_mi2s_active: quad-active-state {
+ data-pins {
+ pins = "gpio2", "gpio3";
+ function = "qua_mi2s_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ sclk-pins {
+ pins = "gpio0";
+ function = "qua_mi2s_sclk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ ws-pins {
+ pins = "gpio1";
+ function = "qua_mi2s_ws";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ lpi_i2s4_active: lpi_i2s4-active-state {
+ data0-pins {
+ pins = "gpio17";
+ function = "i2s4_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ clk-pins {
+ pins = "gpio12";
+ function = "i2s4_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ ws-pins {
+ pins = "gpio13";
+ function = "i2s4_ws";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
};
lpass_ag_noc: interconnect@3c40000 {
--
2.47.3
On 3/13/26 11:38 AM, Srinivas Kandagatla wrote: > From: Loic Poulain <loic.poulain@oss.qualcomm.com> > > Add device tree support for the Arduino VENTUNO Q board, > based on the Qualcomm QCS8300 (Monaco) SoC. > > The board features a Qualcomm Monza SoM and integrates various > peripherals, including: > - USB Type‑C connector with dual‑role support > - ADV7535 DSI‑to‑HDMI bridge > - MAX98091 audio codec > - 2.5G Ethernet PHY (HSGMII) > - PCIe0 (to onboard WiFi chipset and USB bridge) > - PCIe1 (to M2/nvme) > - Button (via GPIO‑keys) > > Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> > Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
On Fri, Mar 13, 2026 at 10:38:21AM +0000, Srinivas Kandagatla wrote:
> From: Loic Poulain <loic.poulain@oss.qualcomm.com>
>
> Add device tree support for the Arduino VENTUNO Q board,
> based on the Qualcomm QCS8300 (Monaco) SoC.
>
> The board features a Qualcomm Monza SoM and integrates various
> peripherals, including:
> - USB Type‑C connector with dual‑role support
> - ADV7535 DSI‑to‑HDMI bridge
> - MAX98091 audio codec
> - 2.5G Ethernet PHY (HSGMII)
> - PCIe0 (to onboard WiFi chipset and USB bridge)
> - PCIe1 (to M2/nvme)
> - Button (via GPIO‑keys)
>
> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/monaco-arduino-monza.dts | 466 ++++++++++++++++++
> arch/arm64/boot/dts/qcom/monaco.dtsi | 55 +++
> 3 files changed, 522 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> index 53cbc08d4df4..837adf569485 100644
> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> @@ -2885,6 +2885,61 @@ lpass_tlmm: pinctrl@3440000 {
NIt: this might have better be squashed into the patch adding LPI TLMM.
Nevertheless,
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&lpass_tlmm 0 0 23>;
> +
> + quad_mclk_active: quad-mclk-state {
> + clk-pins {
> + pins = "gpio5";
> + function = "ext_mclk1_c";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> +
> + quad_mi2s_active: quad-active-state {
> + data-pins {
> + pins = "gpio2", "gpio3";
> + function = "qua_mi2s_data";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + sclk-pins {
> + pins = "gpio0";
> + function = "qua_mi2s_sclk";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + ws-pins {
> + pins = "gpio1";
> + function = "qua_mi2s_ws";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> +
> + lpi_i2s4_active: lpi_i2s4-active-state {
> + data0-pins {
> + pins = "gpio17";
> + function = "i2s4_data";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + clk-pins {
> + pins = "gpio12";
> + function = "i2s4_clk";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + ws-pins {
> + pins = "gpio13";
> + function = "i2s4_ws";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> };
>
> lpass_ag_noc: interconnect@3c40000 {
> --
> 2.47.3
>
--
With best wishes
Dmitry
© 2016 - 2026 Red Hat, Inc.