The mpll3 clock is one parent clock of the sd_emmc and mipi_isp clocks
on the Amlogic T7 SoC, but was missing from t7-peripherals-clkc.yaml
bindings. Add the mpll3 clock source to the T7 peripherals clock
controller input clock list, so that sd_emmc and mipi_isp can use it.

For logical consistency, place the required mpll3 entry before the
optional entry.

This change breaks the ABI, but while the amlogic,t7-peripherals-clkc
bindings have been merged upstream, the corresponding DT has not been
merged yet. Thus, no real users or systems are affected.

Fixes: b4156204e0f5 ("dt-bindings: clock: add Amlogic T7 peripherals clock controller")
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
---
 .../bindings/clock/amlogic,t7-peripherals-clkc.yaml  | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
index 55bb73707d58..a4b214a941ea 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml
@@ -24,7 +24,7 @@ properties:
     const: 1
 
   clocks:
-    minItems: 14
+    minItems: 15
     items:
       - description: input oscillator
       - description: input sys clk
@@ -40,12 +40,13 @@ properties:
       - description: input gp1 pll
       - description: input mpll1
       - description: input mpll2
+      - description: input mpll3
       - description: external input rmii oscillator (optional)
       - description: input video pll0 (optional)
       - description: external pad input for rtc (optional)
 
   clock-names:
-    minItems: 14
+    minItems: 15
     items:
       - const: xtal
       - const: sys
@@ -61,6 +62,7 @@ properties:
       - const: gp1
       - const: mpll1
       - const: mpll2
+      - const: mpll3
       - const: ext_rmii
       - const: vid_pll0
       - const: ext_rtc
@@ -97,7 +99,8 @@ examples:
                      <&gp0 1>,
                      <&gp1 1>,
                      <&mpll 4>,
-                     <&mpll 6>;
+                     <&mpll 6>,
+                     <&mpll 8>;
             clock-names = "xtal",
                           "sys",
                           "fix",
@@ -111,6 +114,7 @@ examples:
                           "gp0",
                           "gp1",
                           "mpll1",
-                          "mpll2";
+                          "mpll2",
+                          "mpll3";
         };
     };
-- 
2.47.1

On Fri, Mar 13, 2026 at 03:00:21PM +0800, Jian Hu wrote:
> The mpll3 clock is one parent clock of the sd_emmc and mipi_isp clocks
> on the Amlogic T7 SoC, but was missing from t7-peripherals-clkc.yaml
> bindings. Add the mpll3 clock source to the T7 peripherals clock
> controller input clock list, so that sd_emmc and mipi_isp can use it.
> 
> For logical consistency, place the required mpll3 entry before the
> optional entry.
> 
> This change breaks the ABI, but while the amlogic,t7-peripherals-clkc
> bindings have been merged upstream, the corresponding DT has not been
> merged yet. Thus, no real users or systems are affected.
> 
> Fixes: b4156204e0f5 ("dt-bindings: clock: add Amlogic T7 peripherals clock controller")
> Signed-off-by: Jian Hu <jian.hu@amlogic.com>
> ---
>  .../bindings/clock/amlogic,t7-peripherals-clkc.yaml  | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)

This should go for current fixes cycle and your cover letter is silent
about it, while patchset combines fixes and non-fixes. You clearly don't
care about maintainers time for deciphering all this.

Well, not my problem.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

On 3/14/2026 5:57 PM, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On Fri, Mar 13, 2026 at 03:00:21PM +0800, Jian Hu wrote:
>> The mpll3 clock is one parent clock of the sd_emmc and mipi_isp clocks
>> on the Amlogic T7 SoC, but was missing from t7-peripherals-clkc.yaml
>> bindings. Add the mpll3 clock source to the T7 peripherals clock
>> controller input clock list, so that sd_emmc and mipi_isp can use it.
>>
>> For logical consistency, place the required mpll3 entry before the
>> optional entry.
>>
>> This change breaks the ABI, but while the amlogic,t7-peripherals-clkc
>> bindings have been merged upstream, the corresponding DT has not been
>> merged yet. Thus, no real users or systems are affected.
>>
>> Fixes: b4156204e0f5 ("dt-bindings: clock: add Amlogic T7 peripherals clock controller")
>> Signed-off-by: Jian Hu <jian.hu@amlogic.com>
>> ---
>>   .../bindings/clock/amlogic,t7-peripherals-clkc.yaml  | 12 ++++++++----
>>   1 file changed, 8 insertions(+), 4 deletions(-)
> This should go for current fixes cycle and your cover letter is silent
> about it, while patchset combines fixes and non-fixes. You clearly don't
> care about maintainers time for deciphering all this.
>
> Well, not my problem.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>


Thanks for pointing this out, my sincere apologies for the mistake and 
the extra work I've caused you.


I will add the reason for each patch in next cover letter.


I will strictly follow this rule in all future submissions. Again, my 
apologies for the inconvenience.

>
> Best regards,
> Krzysztof
>