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[PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail

Dmitry Baryshkov posted 6 patches 3 weeks, 3 days ago
[PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
Posted by Dmitry Baryshkov 3 weeks, 3 days ago 
The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 357e43b90740..9437360ea215 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5236,13 +5236,13 @@ opp-196000000 {
 
 				opp-300000000 {
 					opp-hz = /bits/ 64 <300000000>;
-					required-opps = <&rpmhpd_opp_low_svs>,
+					required-opps = <&rpmhpd_opp_svs>,
 							<&rpmhpd_opp_low_svs>;
 				};
 
 				opp-380000000 {
 					opp-hz = /bits/ 64 <380000000>;
-					required-opps = <&rpmhpd_opp_svs>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_svs>;
 				};
 
@@ -5254,13 +5254,13 @@ opp-435000000 {
 
 				opp-480000000 {
 					opp-hz = /bits/ 64 <480000000>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-533333334 {
 					opp-hz = /bits/ 64 <533333334>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_turbo>;
 				};
 			};

-- 
2.47.3
Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
Posted by Dikshita Agarwal 2 weeks, 6 days ago 

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 357e43b90740..9437360ea215 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -5236,13 +5236,13 @@ opp-196000000 {
>  
>  				opp-300000000 {
>  					opp-hz = /bits/ 64 <300000000>;

I see in the document that this level value should be 280000000, could you
pls check and update accordingly.

> -					required-opps = <&rpmhpd_opp_low_svs>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_low_svs>;
>  				};
>  
>  				opp-380000000 {
>  					opp-hz = /bits/ 64 <380000000>;
> -					required-opps = <&rpmhpd_opp_svs>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_svs>;
>  				};
>  
> @@ -5254,13 +5254,13 @@ opp-435000000 {
>  
>  				opp-480000000 {
>  					opp-hz = /bits/ 64 <480000000>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-533333334 {
>  					opp-hz = /bits/ 64 <533333334>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  			};
> 

with above comment addressed.

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita
Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
Posted by Dmitry Baryshkov 2 weeks, 6 days ago 
On Wed, Mar 18, 2026 at 10:54:07AM +0530, Dikshita Agarwal wrote:
> 
> 
> On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> > The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> > match the PLL corners on the MXC rail. Correct the performance corners
> > for the MXC rail following the PLL documentation.
> > 
> > Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > index 357e43b90740..9437360ea215 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > @@ -5236,13 +5236,13 @@ opp-196000000 {
> >  
> >  				opp-300000000 {
> >  					opp-hz = /bits/ 64 <300000000>;
> 
> I see in the document that this level value should be 280000000, could you
> pls check and update accordingly.

I cross-checked, the table for SM8650 lists 300 MHz here.

> 
> > -					required-opps = <&rpmhpd_opp_low_svs>,
> > +					required-opps = <&rpmhpd_opp_svs>,
> >  							<&rpmhpd_opp_low_svs>;
> >  				};
> >  
> >  				opp-380000000 {
> >  					opp-hz = /bits/ 64 <380000000>;
> > -					required-opps = <&rpmhpd_opp_svs>,
> > +					required-opps = <&rpmhpd_opp_svs_l1>,
> >  							<&rpmhpd_opp_svs>;
> >  				};
> >  
> > @@ -5254,13 +5254,13 @@ opp-435000000 {
> >  
> >  				opp-480000000 {
> >  					opp-hz = /bits/ 64 <480000000>;
> > -					required-opps = <&rpmhpd_opp_nom>,
> > +					required-opps = <&rpmhpd_opp_svs_l1>,
> >  							<&rpmhpd_opp_nom>;
> >  				};
> >  
> >  				opp-533333334 {
> >  					opp-hz = /bits/ 64 <533333334>;
> > -					required-opps = <&rpmhpd_opp_turbo>,
> > +					required-opps = <&rpmhpd_opp_svs_l1>,
> >  							<&rpmhpd_opp_turbo>;
> >  				};
> >  			};
> > 
> 
> with above comment addressed.
> 
> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
> 
> Thanks,
> Dikshita

-- 
With best wishes
Dmitry
Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
Posted by Dikshita Agarwal 2 weeks, 6 days ago 

On 3/18/2026 12:32 PM, Dmitry Baryshkov wrote:
> On Wed, Mar 18, 2026 at 10:54:07AM +0530, Dikshita Agarwal wrote:
>>
>>
>> On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
>>> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
>>> match the PLL corners on the MXC rail. Correct the performance corners
>>> for the MXC rail following the PLL documentation.
>>>
>>> Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
>>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> index 357e43b90740..9437360ea215 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> @@ -5236,13 +5236,13 @@ opp-196000000 {
>>>  
>>>  				opp-300000000 {
>>>  					opp-hz = /bits/ 64 <300000000>;
>>
>> I see in the document that this level value should be 280000000, could you
>> pls check and update accordingly.
> 
> I cross-checked, the table for SM8650 lists 300 MHz here.

Ack.

Thanks,
Dikshita
> 
>>
>>> -					required-opps = <&rpmhpd_opp_low_svs>,
>>> +					required-opps = <&rpmhpd_opp_svs>,
>>>  							<&rpmhpd_opp_low_svs>;
>>>  				};
>>>  
>>>  				opp-380000000 {
>>>  					opp-hz = /bits/ 64 <380000000>;
>>> -					required-opps = <&rpmhpd_opp_svs>,
>>> +					required-opps = <&rpmhpd_opp_svs_l1>,
>>>  							<&rpmhpd_opp_svs>;
>>>  				};
>>>  
>>> @@ -5254,13 +5254,13 @@ opp-435000000 {
>>>  
>>>  				opp-480000000 {
>>>  					opp-hz = /bits/ 64 <480000000>;
>>> -					required-opps = <&rpmhpd_opp_nom>,
>>> +					required-opps = <&rpmhpd_opp_svs_l1>,
>>>  							<&rpmhpd_opp_nom>;
>>>  				};
>>>  
>>>  				opp-533333334 {
>>>  					opp-hz = /bits/ 64 <533333334>;
>>> -					required-opps = <&rpmhpd_opp_turbo>,
>>> +					required-opps = <&rpmhpd_opp_svs_l1>,
>>>  							<&rpmhpd_opp_turbo>;
>>>  				};
>>>  			};
>>>
>>
>> with above comment addressed.
>>
>> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
>>
>> Thanks,
>> Dikshita
>

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