[PATCH 0/6] arm64: dts: qcom: correct Iris corners for the MXC rail

Dmitry Baryshkov posted 6 patches 3 weeks, 3 days ago
arch/arm64/boot/dts/qcom/hamoa.dtsi  |  6 +++---
arch/arm64/boot/dts/qcom/lemans.dtsi |  6 +++---
arch/arm64/boot/dts/qcom/monaco.dtsi |  6 +++---
arch/arm64/boot/dts/qcom/sm8550.dtsi |  6 +++---
arch/arm64/boot/dts/qcom/sm8650.dtsi |  8 ++++----
arch/arm64/boot/dts/qcom/sm8750.dtsi | 12 ++++++------
6 files changed, 22 insertions(+), 22 deletions(-)
[PATCH 0/6] arm64: dts: qcom: correct Iris corners for the MXC rail
Posted by Dmitry Baryshkov 3 weeks, 3 days ago
The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. The slightly misleading
documentation for the video clock controllers doesn't help with this
subject. Correct the performance corners for the MXC rail following
the PLL documentation.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Dmitry Baryshkov (6):
      arm64: dts: qcom: hamoa: correct Iris corners for the MXC rail
      arm64: dts: qcom: lemans: correct Iris corners for the MXC rail
      arm64: dts: qcom: monaco: correct Iris corners for the MXC rail
      arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail
      arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
      arm64: dts: qcom: sm8750: correct Iris corners for the MXC rail

 arch/arm64/boot/dts/qcom/hamoa.dtsi  |  6 +++---
 arch/arm64/boot/dts/qcom/lemans.dtsi |  6 +++---
 arch/arm64/boot/dts/qcom/monaco.dtsi |  6 +++---
 arch/arm64/boot/dts/qcom/sm8550.dtsi |  6 +++---
 arch/arm64/boot/dts/qcom/sm8650.dtsi |  8 ++++----
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 12 ++++++------
 6 files changed, 22 insertions(+), 22 deletions(-)
---
base-commit: 5c9e55fecf9365890c64f14761a80f9413a3b1d1
change-id: 20260313-iris-fix-corners-bc7492a67bbd

Best regards,
-- 
With best wishes
Dmitry
Re: [PATCH 0/6] arm64: dts: qcom: correct Iris corners for the MXC rail
Posted by Bjorn Andersson 2 weeks, 5 days ago
On Fri, 13 Mar 2026 17:27:07 +0200, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. The slightly misleading
> documentation for the video clock controllers doesn't help with this
> subject. Correct the performance corners for the MXC rail following
> the PLL documentation.
> 
> 
> [...]

Applied, thanks!

[1/6] arm64: dts: qcom: hamoa: correct Iris corners for the MXC rail
      commit: c8e354964507d97cef405b2633790f99bb6a5020
[2/6] arm64: dts: qcom: lemans: correct Iris corners for the MXC rail
      commit: a98ebb7e62a93a8d75de705e866d0398bb80afcf
[3/6] arm64: dts: qcom: monaco: correct Iris corners for the MXC rail
      commit: 509be41a761f018db2669ccec22fbdf7bca1ed03
[4/6] arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail
      commit: e973ef6fa0f7ed10dd3efefdba1a41d011e463cb
[5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
      commit: c87d630e1b02cd0118373c4344be4895cf2def33
[6/6] arm64: dts: qcom: sm8750: correct Iris corners for the MXC rail
      commit: 3d51fdb6d08c867c1a067457a5c5766a6f6fe9b9

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>