From: Manish Honap <mhonap@nvidia.com>

Introduce the Kconfig option CONFIG_VFIO_CXL_CORE and the necessary
build rules to compile CXL Type-2 passthrough support into the
vfio-pci-core module.  The new option depends on VFIO_PCI_CORE,
CXL_BUS and CXL_MEM.

Wire up the detection and cleanup entry-point stubs in
vfio_pci_core_register_device() and vfio_pci_core_unregister_device()
so that subsequent patches can fill in the CXL-specific logic without
touching the vfio-pci-core flow again.

The vfio_cxl_core.c file added here is an empty skeleton; the actual
CXL detection and initialisation code is introduced in the following
patch to keep this build-system patch reviewable on its own.

Signed-off-by: Manish Honap <mhonap@nvidia.com>
---
 drivers/vfio/pci/Kconfig             |  2 ++
 drivers/vfio/pci/Makefile            |  1 +
 drivers/vfio/pci/cxl/Kconfig         |  7 ++++++
 drivers/vfio/pci/cxl/vfio_cxl_core.c | 35 ++++++++++++++++++++++++++++
 drivers/vfio/pci/vfio_pci_core.c     |  4 ++++
 drivers/vfio/pci/vfio_pci_priv.h     | 14 +++++++++++
 6 files changed, 63 insertions(+)
 create mode 100644 drivers/vfio/pci/cxl/Kconfig
 create mode 100644 drivers/vfio/pci/cxl/vfio_cxl_core.c

diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig
index 1e82b44bda1a..b981a7c164ca 100644
--- a/drivers/vfio/pci/Kconfig
+++ b/drivers/vfio/pci/Kconfig
@@ -68,6 +68,8 @@ source "drivers/vfio/pci/virtio/Kconfig"
 
 source "drivers/vfio/pci/nvgrace-gpu/Kconfig"
 
+source "drivers/vfio/pci/cxl/Kconfig"
+
 source "drivers/vfio/pci/qat/Kconfig"
 
 source "drivers/vfio/pci/xe/Kconfig"
diff --git a/drivers/vfio/pci/Makefile b/drivers/vfio/pci/Makefile
index e0a0757dd1d2..ecb0eacbc089 100644
--- a/drivers/vfio/pci/Makefile
+++ b/drivers/vfio/pci/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 vfio-pci-core-y := vfio_pci_core.o vfio_pci_intrs.o vfio_pci_rdwr.o vfio_pci_config.o
+vfio-pci-core-$(CONFIG_VFIO_CXL_CORE) += cxl/vfio_cxl_core.o
 vfio-pci-core-$(CONFIG_VFIO_PCI_ZDEV_KVM) += vfio_pci_zdev.o
 vfio-pci-core-$(CONFIG_VFIO_PCI_DMABUF) += vfio_pci_dmabuf.o
 obj-$(CONFIG_VFIO_PCI_CORE) += vfio-pci-core.o
diff --git a/drivers/vfio/pci/cxl/Kconfig b/drivers/vfio/pci/cxl/Kconfig
new file mode 100644
index 000000000000..41d60dc0de2d
--- /dev/null
+++ b/drivers/vfio/pci/cxl/Kconfig
@@ -0,0 +1,7 @@
+config VFIO_CXL_CORE
+	bool "VFIO CXL core"
+	depends on VFIO_PCI_CORE && CXL_BUS && CXL_MEM
+	help
+	  Core library for VFIO CXL Type-2 device support (enlightened path).
+	  When enabled, vfio-pci-core can detect and manage CXL Type-2 devices
+	  without a separate variant driver.
diff --git a/drivers/vfio/pci/cxl/vfio_cxl_core.c b/drivers/vfio/pci/cxl/vfio_cxl_core.c
new file mode 100644
index 000000000000..7698d94e16be
--- /dev/null
+++ b/drivers/vfio/pci/cxl/vfio_cxl_core.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * VFIO CXL Core - Common infrastructure for CXL Type-2 device variant drivers
+ *
+ * Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved
+ *
+ * This module provides common functionality for VFIO variant drivers that
+ * support CXL Type-2 devices (cache-coherent accelerators with attached memory).
+ */
+
+#include <linux/vfio_pci_core.h>
+#include <linux/pci.h>
+#include <cxl/cxl.h>
+#include <cxl/pci.h>
+
+#include "../vfio_pci_priv.h"
+#include "vfio_cxl_priv.h"
+
+MODULE_IMPORT_NS("CXL");
+
+/**
+ * vfio_pci_cxl_detect_and_init - Detect and initialize CXL Type-2 device
+ * @vdev: VFIO PCI device
+ *
+ * Called from vfio_pci_core_register_device(). Detects CXL DVSEC capability
+ * and initializes CXL features. On failure vdev->cxl remains NULL and the
+ * device operates as a standard PCI device.
+ */
+void vfio_pci_cxl_detect_and_init(struct vfio_pci_core_device *vdev)
+{
+}
+
+void vfio_pci_cxl_cleanup(struct vfio_pci_core_device *vdev)
+{
+}
diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c
index 3a11e6f450f7..b7364178e23d 100644
--- a/drivers/vfio/pci/vfio_pci_core.c
+++ b/drivers/vfio/pci/vfio_pci_core.c
@@ -2181,6 +2181,8 @@ int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev)
 	if (ret)
 		goto out_vf;
 
+	vfio_pci_cxl_detect_and_init(vdev);
+
 	vfio_pci_probe_power_state(vdev);
 
 	/*
@@ -2224,6 +2226,8 @@ void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev)
 	vfio_pci_vf_uninit(vdev);
 	vfio_pci_vga_uninit(vdev);
 
+	vfio_pci_cxl_cleanup(vdev);
+
 	if (!disable_idle_d3)
 		pm_runtime_get_noresume(&vdev->pdev->dev);
 
diff --git a/drivers/vfio/pci/vfio_pci_priv.h b/drivers/vfio/pci/vfio_pci_priv.h
index 27ac280f00b9..d7df5538dcde 100644
--- a/drivers/vfio/pci/vfio_pci_priv.h
+++ b/drivers/vfio/pci/vfio_pci_priv.h
@@ -133,4 +133,18 @@ static inline void vfio_pci_dma_buf_move(struct vfio_pci_core_device *vdev,
 }
 #endif
 
+#if IS_ENABLED(CONFIG_VFIO_CXL_CORE)
+
+void vfio_pci_cxl_detect_and_init(struct vfio_pci_core_device *vdev);
+void vfio_pci_cxl_cleanup(struct vfio_pci_core_device *vdev);
+
+#else
+
+static inline void
+vfio_pci_cxl_detect_and_init(struct vfio_pci_core_device *vdev) { }
+static inline void
+vfio_pci_cxl_cleanup(struct vfio_pci_core_device *vdev) { }
+
+#endif /* CONFIG_VFIO_CXL_CORE */
+
 #endif
-- 
2.25.1

On Thu, 12 Mar 2026 02:04:28 +0530
mhonap@nvidia.com wrote:

> From: Manish Honap <mhonap@nvidia.com>
> 
> Introduce the Kconfig option CONFIG_VFIO_CXL_CORE and the necessary
> build rules to compile CXL Type-2 passthrough support into the
> vfio-pci-core module.  The new option depends on VFIO_PCI_CORE,
> CXL_BUS and CXL_MEM.
> 
> Wire up the detection and cleanup entry-point stubs in
> vfio_pci_core_register_device() and vfio_pci_core_unregister_device()
> so that subsequent patches can fill in the CXL-specific logic without
> touching the vfio-pci-core flow again.
> 
> The vfio_cxl_core.c file added here is an empty skeleton; the actual
> CXL detection and initialisation code is introduced in the following
> patch to keep this build-system patch reviewable on its own.
> 
> Signed-off-by: Manish Honap <mhonap@nvidia.com>
Hi Manish,
A few trivial things inline.

> diff --git a/drivers/vfio/pci/cxl/vfio_cxl_core.c b/drivers/vfio/pci/cxl/vfio_cxl_core.c
> new file mode 100644
> index 000000000000..7698d94e16be
> --- /dev/null
> +++ b/drivers/vfio/pci/cxl/vfio_cxl_core.c
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * VFIO CXL Core - Common infrastructure for CXL Type-2 device variant drivers
> + *
> + * Copyright (c) 2026, NVIDIA CORPORATION & AFFILIATES. All rights reserved
> + *
> + * This module provides common functionality for VFIO variant drivers that
> + * support CXL Type-2 devices (cache-coherent accelerators with attached memory).
As I mentioned for docs, that definition needs some finessing as also 
CXL Type3 devices, though intention is not the ones compliant with the class
code as those can be nicely paravirtualized.

There is a whole class of CXL.mem only devices with various forms of accelerator
that never need CXL.cache and so aren't Type 2.

E.g. Compressed memory type 3 devices are known to be in the wild.

> + */
> +
> +#include <linux/vfio_pci_core.h>
> +#include <linux/pci.h>
> +#include <cxl/cxl.h>
> +#include <cxl/pci.h>
> +
> +#include "../vfio_pci_priv.h"
> +#include "vfio_cxl_priv.h"
> +
> +MODULE_IMPORT_NS("CXL");

Most often I've seen this added at the end of file next other MODULE_X calls.
Whilse we don't have any of those here, still feels like a sensible place to put it.


> +
> +/**
> + * vfio_pci_cxl_detect_and_init - Detect and initialize CXL Type-2 device
> + * @vdev: VFIO PCI device
> + *
> + * Called from vfio_pci_core_register_device(). Detects CXL DVSEC capability
> + * and initializes CXL features. On failure vdev->cxl remains NULL and the
> + * device operates as a standard PCI device.
> + */
> +void vfio_pci_cxl_detect_and_init(struct vfio_pci_core_device *vdev)
> +{
> +}
> +
> +void vfio_pci_cxl_cleanup(struct vfio_pci_core_device *vdev)
> +{
> +}