On 3/11/2026 9:01 AM, Gautham R. Shenoy wrote:
> The function msr_update_perf() does not cache the new value that is
> written to MSR_AMD_CPPC_REQ into the variable cpudata->cppc_req_cached
> when the update is happening from the fast path.
>
> Fix that by caching the value everytime the MSR_AMD_CPPC_REQ gets
> updated.
>
> This issue was discovered by Claude Opus 4.6 with the aid of Chris
> Mason's AI review-prompts
> (https://github.com/masoncl/review-prompts/tree/main/kernel).
>
> Assisted-by: Claude:claude-opus-4.6 review-prompts/linux
> Fixes: fff395796917 ("cpufreq/amd-pstate: Always write EPP value when updating perf")
> Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
> ---
> drivers/cpufreq/amd-pstate.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index d57969c72c9dc..24cdeffbcd40e 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -261,7 +261,6 @@ static int msr_update_perf(struct cpufreq_policy *policy, u8 min_perf,
>
> if (fast_switch) {
> wrmsrq(MSR_AMD_CPPC_REQ, value);
> - return 0;
> } else {
> int ret = wrmsrq_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);
>