1. Patchew
  2. linux
  3. [PATCH v3 0/3] PCI: qcom: Program T_POWER_ON value for L1.2 exit timing
  4. View patch

[PATCH v3 3/3] PCI: qcom: Program T_POWER_ON

Krishna Chaitanya Chundru posted 3 patches 3 weeks, 6 days ago
There is a newer version of this series
[PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Krishna Chaitanya Chundru 3 weeks, 6 days ago 
Some platforms have incorrect T_POWER_ON value programmed in hardware.
Generally these will be corrected by bootloaders, but not all targets
support bootloaders to program correct values due to that
LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
can result in improper L1.2 exit behavior and if AER happens to be
supported and enabled, the error may be *reported* via AER.

Parse "t-power-on-us" property from each root port node and program them
as part of host initialization using dw_pcie_program_t_power_on() before
link training.

This property in added to the dtschema here[1].

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Link[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
---
 drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -269,6 +269,7 @@ struct qcom_pcie_perst {
 struct qcom_pcie_port {
 	struct list_head list;
 	struct phy *phy;
+	u32 l1ss_t_power_on;
 	struct list_head perst;
 };
 
@@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)
 	return 0;
 }
 
+static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
+{
+	struct qcom_pcie_port *port;
+
+	list_for_each_entry(port, &pcie->ports, list)
+		dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
+}
+
 static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
 {
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
@@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
 	dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
 	dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
 
+	qcom_pcie_configure_ports(pcie);
+
 	qcom_pcie_perst_deassert(pcie);
 
 	if (pcie->cfg->ops->config_sid) {
@@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
 	if (ret)
 		return ret;
 
+	of_property_read_u32(node, "t-power-on-us", &port->l1ss_t_power_on);
+
 	port->phy = phy;
 	INIT_LIST_HEAD(&port->list);
 	list_add_tail(&port->list, &pcie->ports);

-- 
2.34.1
Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Manivannan Sadhasivam 3 weeks, 1 day ago 
On Wed, Mar 11, 2026 at 06:10:40PM +0530, Krishna Chaitanya Chundru wrote:
> Some platforms have incorrect T_POWER_ON value programmed in hardware.
> Generally these will be corrected by bootloaders, but not all targets
> support bootloaders to program correct values due to that
> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
> can result in improper L1.2 exit behavior and if AER happens to be
> supported and enabled, the error may be *reported* via AER.
> 
> Parse "t-power-on-us" property from each root port node and program them
> as part of host initialization using dw_pcie_program_t_power_on() before
> link training.
> 
> This property in added to the dtschema here[1].
> 
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> Link[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>  struct qcom_pcie_port {
>  	struct list_head list;
>  	struct phy *phy;
> +	u32 l1ss_t_power_on;
>  	struct list_head perst;
>  };
>  
> @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)
>  	return 0;
>  }
>  
> +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
> +{
> +	struct qcom_pcie_port *port;
> +
> +	list_for_each_entry(port, &pcie->ports, list)
> +		dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
> +}
> +
>  static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>  {
>  	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>  	dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>  	dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>  
> +	qcom_pcie_configure_ports(pcie);
> +
>  	qcom_pcie_perst_deassert(pcie);
>  
>  	if (pcie->cfg->ops->config_sid) {
> @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
>  	if (ret)
>  		return ret;
>  
> +	of_property_read_u32(node, "t-power-on-us", &port->l1ss_t_power_on);
> +

Since this is going to be common for all controller drivers, it'd be good to
move this inside the dwc API.

- Mani

-- 
மணிவண்ணன் சதாசிவம்
Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Krishna Chaitanya Chundru 3 weeks, 1 day ago 

On 3/16/2026 10:23 AM, Manivannan Sadhasivam wrote:
> On Wed, Mar 11, 2026 at 06:10:40PM +0530, Krishna Chaitanya Chundru wrote:
>> Some platforms have incorrect T_POWER_ON value programmed in hardware.
>> Generally these will be corrected by bootloaders, but not all targets
>> support bootloaders to program correct values due to that
>> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
>> can result in improper L1.2 exit behavior and if AER happens to be
>> supported and enabled, the error may be *reported* via AER.
>>
>> Parse "t-power-on-us" property from each root port node and program them
>> as part of host initialization using dw_pcie_program_t_power_on() before
>> link training.
>>
>> This property in added to the dtschema here[1].
>>
>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>> Link[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
>> ---
>>   drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>>   struct qcom_pcie_port {
>>   	struct list_head list;
>>   	struct phy *phy;
>> +	u32 l1ss_t_power_on;
>>   	struct list_head perst;
>>   };
>>   
>> @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)
>>   	return 0;
>>   }
>>   
>> +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
>> +{
>> +	struct qcom_pcie_port *port;
>> +
>> +	list_for_each_entry(port, &pcie->ports, list)
>> +		dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
>> +}
>> +
>>   static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>   {
>>   	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>   	dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>>   	dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>>   
>> +	qcom_pcie_configure_ports(pcie);
>> +
>>   	qcom_pcie_perst_deassert(pcie);
>>   
>>   	if (pcie->cfg->ops->config_sid) {
>> @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
>>   	if (ret)
>>   		return ret;
>>   
>> +	of_property_read_u32(node, "t-power-on-us", &port->l1ss_t_power_on);
>> +
> Since this is going to be common for all controller drivers, it'd be good to
> move this inside the dwc API.
As this per root port, we can summit changes to merge first so that we 
can move this to
dwc.

- Krishna Chaitanya.
>
> - Mani
>
Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Manivannan Sadhasivam 3 weeks, 1 day ago 
On Mon, Mar 16, 2026 at 10:35:50AM +0530, Krishna Chaitanya Chundru wrote:
> 
> 
> On 3/16/2026 10:23 AM, Manivannan Sadhasivam wrote:
> > On Wed, Mar 11, 2026 at 06:10:40PM +0530, Krishna Chaitanya Chundru wrote:
> > > Some platforms have incorrect T_POWER_ON value programmed in hardware.
> > > Generally these will be corrected by bootloaders, but not all targets
> > > support bootloaders to program correct values due to that
> > > LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
> > > can result in improper L1.2 exit behavior and if AER happens to be
> > > supported and enabled, the error may be *reported* via AER.
> > > 
> > > Parse "t-power-on-us" property from each root port node and program them
> > > as part of host initialization using dw_pcie_program_t_power_on() before
> > > link training.
> > > 
> > > This property in added to the dtschema here[1].
> > > 
> > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> > > Link[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
> > > ---
> > >   drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
> > >   1 file changed, 13 insertions(+)
> > > 
> > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> > > index 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 100644
> > > --- a/drivers/pci/controller/dwc/pcie-qcom.c
> > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> > > @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
> > >   struct qcom_pcie_port {
> > >   	struct list_head list;
> > >   	struct phy *phy;
> > > +	u32 l1ss_t_power_on;
> > >   	struct list_head perst;
> > >   };
> > > @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)
> > >   	return 0;
> > >   }
> > > +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
> > > +{
> > > +	struct qcom_pcie_port *port;
> > > +
> > > +	list_for_each_entry(port, &pcie->ports, list)
> > > +		dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
> > > +}
> > > +
> > >   static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
> > >   {
> > >   	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > > @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
> > >   	dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
> > >   	dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
> > > +	qcom_pcie_configure_ports(pcie);
> > > +
> > >   	qcom_pcie_perst_deassert(pcie);
> > >   	if (pcie->cfg->ops->config_sid) {
> > > @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
> > >   	if (ret)
> > >   		return ret;
> > > +	of_property_read_u32(node, "t-power-on-us", &port->l1ss_t_power_on);
> > > +
> > Since this is going to be common for all controller drivers, it'd be good to
> > move this inside the dwc API.
> As this per root port, we can summit changes to merge first so that we can
> move this to
> dwc.
> 

Fair. Atleast add a TODO here.

- Mani

-- 
மணிவண்ணன் சதாசிவம்
Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Shawn Lin 3 weeks, 4 days ago 
在 2026/03/11 星期三 20:40, Krishna Chaitanya Chundru 写道:
> Some platforms have incorrect T_POWER_ON value programmed in hardware.
> Generally these will be corrected by bootloaders, but not all targets
> support bootloaders to program correct values due to that
> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
> can result in improper L1.2 exit behavior and if AER happens to be
> supported and enabled, the error may be *reported* via AER.
> 
> Parse "t-power-on-us" property from each root port node and program them
> as part of host initialization using dw_pcie_program_t_power_on() before
> link training.
> 
> This property in added to the dtschema here[1].
> 
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> Link[1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
> ---
>   drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>   struct qcom_pcie_port {
>   	struct list_head list;
>   	struct phy *phy;
> +	u32 l1ss_t_power_on;

u16?

>   	struct list_head perst;
>   };
>   
> @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct qcom_pcie *pcie)
>   	return 0;
>   }
>   
> +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
> +{
> +	struct qcom_pcie_port *port;
> +
> +	list_for_each_entry(port, &pcie->ports, list)
> +		dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
> +}
> +
>   static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>   {
>   	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>   	dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>   	dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>   
> +	qcom_pcie_configure_ports(pcie);
> +
>   	qcom_pcie_perst_deassert(pcie);
>   
>   	if (pcie->cfg->ops->config_sid) {
> @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct qcom_pcie *pcie, struct device_node *node
>   	if (ret)
>   		return ret;
>   
> +	of_property_read_u32(node, "t-power-on-us", &port->l1ss_t_power_on);

Ditto?

> +
>   	port->phy = phy;
>   	INIT_LIST_HEAD(&port->list);
>   	list_add_tail(&port->list, &pcie->ports);
>
Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Krishna Chaitanya Chundru 1 week, 1 day ago 

On 3/13/2026 8:19 AM, Shawn Lin wrote:
> 在 2026/03/11 星期三 20:40, Krishna Chaitanya Chundru 写道:
>> Some platforms have incorrect T_POWER_ON value programmed in hardware.
>> Generally these will be corrected by bootloaders, but not all targets
>> support bootloaders to program correct values due to that
>> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
>> can result in improper L1.2 exit behavior and if AER happens to be
>> supported and enabled, the error may be *reported* via AER.
>>
>> Parse "t-power-on-us" property from each root port node and program them
>> as part of host initialization using dw_pcie_program_t_power_on() before
>> link training.
>>
>> This property in added to the dtschema here[1].
>>
>> Signed-off-by: Krishna Chaitanya Chundru 
>> <krishna.chundru@oss.qualcomm.com>
>> Link[1]: 
>> https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/
>> ---
>>   drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c 
>> b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 
>> 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 
>> 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>>   struct qcom_pcie_port {
>>       struct list_head list;
>>       struct phy *phy;
>> +    u32 l1ss_t_power_on;
>
> u16?
>
>>       struct list_head perst;
>>   };
>>   @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct 
>> qcom_pcie *pcie)
>>       return 0;
>>   }
>>   +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
>> +{
>> +    struct qcom_pcie_port *port;
>> +
>> +    list_for_each_entry(port, &pcie->ports, list)
>> +        dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
>> +}
>> +
>>   static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>   {
>>       struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct 
>> dw_pcie_rp *pp)
>>       dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>>       dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>>   +    qcom_pcie_configure_ports(pcie);
>> +
>>       qcom_pcie_perst_deassert(pcie);
>>         if (pcie->cfg->ops->config_sid) {
>> @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct 
>> qcom_pcie *pcie, struct device_node *node
>>       if (ret)
>>           return ret;
>>   +    of_property_read_u32(node, "t-power-on-us", 
>> &port->l1ss_t_power_on);
>
> Ditto?
the property has -us and doesn't have $ref to indicate if it is u32 or 
u16, by default it is u32 property only.
can we can't keep it as u16 even if have always less than u16.

- Krishna Chaitanya.
>> +
>>       port->phy = phy;
>>       INIT_LIST_HEAD(&port->list);
>>       list_add_tail(&port->list, &pcie->ports);
>>
Re: [PATCH v3 3/3] PCI: qcom: Program T_POWER_ON
Posted by Shawn Lin 1 week, 1 day ago 
在 2026/03/30 星期一 16:16, Krishna Chaitanya Chundru 写道:
> 
> 
> On 3/13/2026 8:19 AM, Shawn Lin wrote:
>> 在 2026/03/11 星期三 20:40, Krishna Chaitanya Chundru 写道:
>>> Some platforms have incorrect T_POWER_ON value programmed in hardware.
>>> Generally these will be corrected by bootloaders, but not all targets
>>> support bootloaders to program correct values due to that
>>> LTR_L1.2_THRESHOLD value calculated by aspm driver can be wrong, which
>>> can result in improper L1.2 exit behavior and if AER happens to be
>>> supported and enabled, the error may be *reported* via AER.
>>>
>>> Parse "t-power-on-us" property from each root port node and program them
>>> as part of host initialization using dw_pcie_program_t_power_on() before
>>> link training.
>>>
>>> This property in added to the dtschema here[1].
>>>
>>> Signed-off-by: Krishna Chaitanya Chundru 
>>> <krishna.chundru@oss.qualcomm.com>
>>> Link[1]: 
>>> https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/ 
>>>
>>> ---
>>>   drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
>>>   1 file changed, 13 insertions(+)
>>>
>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c 
>>> b/drivers/pci/controller/dwc/pcie-qcom.c
>>> index 
>>> 67a16af69ddc75fca1b123e70715e692a91a9135..63d5628e988d3c07f42099c0d86e6b80fd54ce32 
>>> 100644
>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>>> @@ -269,6 +269,7 @@ struct qcom_pcie_perst {
>>>   struct qcom_pcie_port {
>>>       struct list_head list;
>>>       struct phy *phy;
>>> +    u32 l1ss_t_power_on;
>>
>> u16?
>>
>>>       struct list_head perst;
>>>   };
>>>   @@ -1283,6 +1284,14 @@ static int qcom_pcie_phy_power_on(struct 
>>> qcom_pcie *pcie)
>>>       return 0;
>>>   }
>>>   +static void qcom_pcie_configure_ports(struct qcom_pcie *pcie)
>>> +{
>>> +    struct qcom_pcie_port *port;
>>> +
>>> +    list_for_each_entry(port, &pcie->ports, list)
>>> +        dw_pcie_program_t_power_on(pcie->pci, port->l1ss_t_power_on);
>>> +}
>>> +
>>>   static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
>>>   {
>>>       struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>>> @@ -1317,6 +1326,8 @@ static int qcom_pcie_host_init(struct 
>>> dw_pcie_rp *pp)
>>>       dw_pcie_remove_capability(pcie->pci, PCI_CAP_ID_MSIX);
>>>       dw_pcie_remove_ext_capability(pcie->pci, PCI_EXT_CAP_ID_DPC);
>>>   +    qcom_pcie_configure_ports(pcie);
>>> +
>>>       qcom_pcie_perst_deassert(pcie);
>>>         if (pcie->cfg->ops->config_sid) {
>>> @@ -1759,6 +1770,8 @@ static int qcom_pcie_parse_port(struct 
>>> qcom_pcie *pcie, struct device_node *node
>>>       if (ret)
>>>           return ret;
>>>   +    of_property_read_u32(node, "t-power-on-us", 
>>> &port->l1ss_t_power_on);
>>
>> Ditto?
> the property has -us and doesn't have $ref to indicate if it is u32 or 
> u16, by default it is u32 property only.
> can we can't keep it as u16 even if have always less than u16.

It came from dw_pcie_program_t_power_on(u16 t_power_on) which
take u16, so the value will be truncated anyway. Well, it's up to you,
just a bypass comment. :)

> 
> - Krishna Chaitanya.
>>> +
>>>       port->phy = phy;
>>>       INIT_LIST_HEAD(&port->list);
>>>       list_add_tail(&port->list, &pcie->ports);
>>>
> 
>

Patchew 2.1-devel-ea86937

© 2016 - 2026 Red Hat, Inc.