From: Leon Romanovsky <leonro@nvidia.com>
The mapping buffers which carry this attribute require DMA coherent system.
This means that they can't take SWIOTLB path, can perform CPU cache overlap
and doesn't perform cache flushing.
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
---
Documentation/core-api/dma-attributes.rst | 12 ++++++++++++
include/linux/dma-mapping.h | 7 +++++++
include/trace/events/dma.h | 3 ++-
kernel/dma/debug.c | 3 ++-
kernel/dma/mapping.c | 6 ++++++
5 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/Documentation/core-api/dma-attributes.rst b/Documentation/core-api/dma-attributes.rst
index 48cfe86cc06d7..69d094f144c70 100644
--- a/Documentation/core-api/dma-attributes.rst
+++ b/Documentation/core-api/dma-attributes.rst
@@ -163,3 +163,15 @@ data corruption.
All mappings that share a cache line must set this attribute to suppress DMA
debug warnings about overlapping mappings.
+
+DMA_ATTR_REQUIRE_COHERENT
+-------------------------
+
+The mapping buffers which carry this attribute require DMA coherent system. This means
+that they can't take SWIOTLB path, can perform CPU cache overlap and doesn't perform
+cache flushing.
+
+If the mapping has this attribute then it is prevented from running on systems
+where these cache artifacts can cause corruption, and as such doesn't need
+cache overlapping debugging code (same behavior as for
+DMA_ATTR_DEBUGGING_IGNORE_CACHELINES).
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index da44394b3a1a7..482b919f040f7 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -86,6 +86,13 @@
*/
#define DMA_ATTR_DEBUGGING_IGNORE_CACHELINES (1UL << 11)
+/*
+ * DMA_ATTR_REQUIRE_COHERENT: Indicates that DMA coherency is required.
+ * All mappings that carry this attribute can't work with SWIOTLB and cache
+ * flushing.
+ */
+#define DMA_ATTR_REQUIRE_COHERENT (1UL << 12)
+
/*
* A dma_addr_t can hold any valid DMA or bus address for the platform. It can
* be given to a device to use as a DMA source or target. It is specific to a
diff --git a/include/trace/events/dma.h b/include/trace/events/dma.h
index 8c64bc0721fe4..63597b0044247 100644
--- a/include/trace/events/dma.h
+++ b/include/trace/events/dma.h
@@ -33,7 +33,8 @@ TRACE_DEFINE_ENUM(DMA_NONE);
{ DMA_ATTR_NO_WARN, "NO_WARN" }, \
{ DMA_ATTR_PRIVILEGED, "PRIVILEGED" }, \
{ DMA_ATTR_MMIO, "MMIO" }, \
- { DMA_ATTR_DEBUGGING_IGNORE_CACHELINES, "CACHELINES_OVERLAP" })
+ { DMA_ATTR_DEBUGGING_IGNORE_CACHELINES, "CACHELINES_OVERLAP" }, \
+ { DMA_ATTR_REQUIRE_COHERENT, "REQUIRE_COHERENT" })
DECLARE_EVENT_CLASS(dma_map,
TP_PROTO(struct device *dev, phys_addr_t phys_addr, dma_addr_t dma_addr,
diff --git a/kernel/dma/debug.c b/kernel/dma/debug.c
index 83e1cfe05f08d..0677918f06a80 100644
--- a/kernel/dma/debug.c
+++ b/kernel/dma/debug.c
@@ -601,7 +601,8 @@ static void add_dma_entry(struct dma_debug_entry *entry, unsigned long attrs)
unsigned long flags;
int rc;
- entry->is_cache_clean = attrs & DMA_ATTR_DEBUGGING_IGNORE_CACHELINES;
+ entry->is_cache_clean = attrs & (DMA_ATTR_DEBUGGING_IGNORE_CACHELINES |
+ DMA_ATTR_REQUIRE_COHERENT);
bucket = get_hash_bucket(entry, &flags);
hash_bucket_add(bucket, entry);
diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
index 3928a509c44c2..6d3dd0bd3a886 100644
--- a/kernel/dma/mapping.c
+++ b/kernel/dma/mapping.c
@@ -164,6 +164,9 @@ dma_addr_t dma_map_phys(struct device *dev, phys_addr_t phys, size_t size,
if (WARN_ON_ONCE(!dev->dma_mask))
return DMA_MAPPING_ERROR;
+ if (!dev_is_dma_coherent(dev) && (attrs & DMA_ATTR_REQUIRE_COHERENT))
+ return DMA_MAPPING_ERROR;
+
if (dma_map_direct(dev, ops) ||
(!is_mmio && arch_dma_map_phys_direct(dev, phys + size)))
addr = dma_direct_map_phys(dev, phys, size, dir, attrs);
@@ -235,6 +238,9 @@ static int __dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
BUG_ON(!valid_dma_direction(dir));
+ if (!dev_is_dma_coherent(dev) && (attrs & DMA_ATTR_REQUIRE_COHERENT))
+ return -EOPNOTSUPP;
+
if (WARN_ON_ONCE(!dev->dma_mask))
return 0;
--
2.53.0On Wed, Mar 11, 2026 at 09:08:47PM +0200, Leon Romanovsky wrote:
> From: Leon Romanovsky <leonro@nvidia.com>
>
> The mapping buffers which carry this attribute require DMA coherent system.
> This means that they can't take SWIOTLB path, can perform CPU cache overlap
> and doesn't perform cache flushing.
>
> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
> ---
> Documentation/core-api/dma-attributes.rst | 12 ++++++++++++
> include/linux/dma-mapping.h | 7 +++++++
> include/trace/events/dma.h | 3 ++-
> kernel/dma/debug.c | 3 ++-
> kernel/dma/mapping.c | 6 ++++++
> 5 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/core-api/dma-attributes.rst b/Documentation/core-api/dma-attributes.rst
> index 48cfe86cc06d7..69d094f144c70 100644
> --- a/Documentation/core-api/dma-attributes.rst
> +++ b/Documentation/core-api/dma-attributes.rst
> @@ -163,3 +163,15 @@ data corruption.
>
> All mappings that share a cache line must set this attribute to suppress DMA
> debug warnings about overlapping mappings.
> +
> +DMA_ATTR_REQUIRE_COHERENT
> +-------------------------
> +
> +The mapping buffers which carry this attribute require DMA coherent system. This means
> +that they can't take SWIOTLB path, can perform CPU cache overlap and doesn't perform
> +cache flushing.
DMA mapping requests with the DMA_ATTR_REQUIRE_COHERENT fail on any
system where SWIOTLB or cache management is required. This should only
be used to support uAPI designs that require continuous HW DMA
coherence with userspace processes, for example RDMA and DRM. At a
minimum the memory being mapped must be userspace memory from
pin_user_pages() or similar.
Drivers should consider using dma_mmap_pages() instead of this
interface when building their uAPIs, when possible.
It must never be used in an in-kernel driver that only works with
kernal memory.
> @@ -164,6 +164,9 @@ dma_addr_t dma_map_phys(struct device *dev, phys_addr_t phys, size_t size,
> if (WARN_ON_ONCE(!dev->dma_mask))
> return DMA_MAPPING_ERROR;
>
> + if (!dev_is_dma_coherent(dev) && (attrs & DMA_ATTR_REQUIRE_COHERENT))
> + return DMA_MAPPING_ERROR;
This doesn't capture enough conditions.. is_swiotlb_force_bounce(),
dma_kmalloc_needs_bounce(), dma_capable(), etc all need to be blocked
too
So check it inside swiotlb_map() too, and maybe shift the above
into the existing branches:
if (!dev_is_dma_coherent(dev) &&
!(attrs & (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_MMIO)))
arch_sync_dma_for_device(phys, size, dir);
Jason
On Thu, Mar 12, 2026 at 09:19:37AM -0300, Jason Gunthorpe wrote: > On Wed, Mar 11, 2026 at 09:08:47PM +0200, Leon Romanovsky wrote: > > From: Leon Romanovsky <leonro@nvidia.com> > > > > The mapping buffers which carry this attribute require DMA coherent system. > > This means that they can't take SWIOTLB path, can perform CPU cache overlap > > and doesn't perform cache flushing. > > > > Signed-off-by: Leon Romanovsky <leonro@nvidia.com> > > --- > > Documentation/core-api/dma-attributes.rst | 12 ++++++++++++ > > include/linux/dma-mapping.h | 7 +++++++ > > include/trace/events/dma.h | 3 ++- > > kernel/dma/debug.c | 3 ++- > > kernel/dma/mapping.c | 6 ++++++ > > 5 files changed, 29 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/core-api/dma-attributes.rst b/Documentation/core-api/dma-attributes.rst > > index 48cfe86cc06d7..69d094f144c70 100644 > > --- a/Documentation/core-api/dma-attributes.rst > > +++ b/Documentation/core-api/dma-attributes.rst > > @@ -163,3 +163,15 @@ data corruption. > > > > All mappings that share a cache line must set this attribute to suppress DMA > > debug warnings about overlapping mappings. > > + > > +DMA_ATTR_REQUIRE_COHERENT > > +------------------------- > > + > > +The mapping buffers which carry this attribute require DMA coherent system. This means > > +that they can't take SWIOTLB path, can perform CPU cache overlap and doesn't perform > > +cache flushing. > > DMA mapping requests with the DMA_ATTR_REQUIRE_COHERENT fail on any > system where SWIOTLB or cache management is required. This should only > be used to support uAPI designs that require continuous HW DMA > coherence with userspace processes, for example RDMA and DRM. At a > minimum the memory being mapped must be userspace memory from > pin_user_pages() or similar. > > Drivers should consider using dma_mmap_pages() instead of this > interface when building their uAPIs, when possible. > > It must never be used in an in-kernel driver that only works with > kernal memory. > > > @@ -164,6 +164,9 @@ dma_addr_t dma_map_phys(struct device *dev, phys_addr_t phys, size_t size, > > if (WARN_ON_ONCE(!dev->dma_mask)) > > return DMA_MAPPING_ERROR; > > > > + if (!dev_is_dma_coherent(dev) && (attrs & DMA_ATTR_REQUIRE_COHERENT)) > > + return DMA_MAPPING_ERROR; > > This doesn't capture enough conditions.. is_swiotlb_force_bounce(), > dma_kmalloc_needs_bounce(), dma_capable(), etc all need to be blocked > too These checks exist in dma_direct_map_phys() and here is the common check between direct and IOMMU modes. Thanks > > So check it inside swiotlb_map() too, and maybe shift the above > into the existing branches: > > if (!dev_is_dma_coherent(dev) && > !(attrs & (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_MMIO))) > arch_sync_dma_for_device(phys, size, dir); > > Jason
© 2016 - 2026 Red Hat, Inc.