[PATCH v2 0/3] Add support for AD5706R DAC

Alexis Czezar Torreno posted 3 patches 4 weeks ago
There is a newer version of this series
.../devicetree/bindings/iio/dac/adi,ad5706r.yaml   |  48 +++++
MAINTAINERS                                        |   8 +
drivers/iio/dac/Kconfig                            |  10 +
drivers/iio/dac/Makefile                           |   1 +
drivers/iio/dac/ad5706r.c                          | 208 +++++++++++++++++++++
5 files changed, 275 insertions(+)
[PATCH v2 0/3] Add support for AD5706R DAC
Posted by Alexis Czezar Torreno 4 weeks ago
This series adds support for the Analog Devices AD5706R, a 4-channel
16-bit current output digital-to-analog converter with SPI interface.

The AD5706R features:
  - 4 independent current output DAC channels
  - Configurable output ranges (50mA, 150mA, 200mA, 300mA)
  - Hardware and software LDAC trigger with configurable edge selection
  - Toggle and dither modes per channel
  - Internal or external voltage reference selection
  - PWM-controlled LDAC
  - Dynamic change SPI speed

The driver exposes standard IIO raw/scale/offset channel attributes for
DAC output control, sampling frequency for PWM-based LDAC timing, and
extended attributes for device configuration including output range
selection, trigger mode, and multiplexer output.

This driver is developed and tested on the Cora Z7S platform using
the AXI SPI Engine and AXI CLKGEN IP cores. The 'clocks' property
enables dynamic SPI clock rate management via the CLKGEN.

Datasheet: https://www.analog.com/en/products/ad5706r.html

Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
---
Changes in v2:
- Stripped driver down to basic DAC functionality (read/write raw,
  read-only scale) as suggested.
- Removed PWM (LDAC), GPIO (reset/shutdown), clock generator,
  SPI engine frequency switching, debugfs streaming, and all
  custom ext_info sysfs attributes
- Removed regmap, IIO_BUFFER, and iio/sysfs.h dependencies
- Simplified SPI read/write to use standard spi_sync_transfer
  without clock mode logic
- Scale reports default 50mA range as read-only using
  IIO_VAL_FRACTIONAL_LOG2; writable range selection deferred
  to future follow-up series
- Simplified DT binding to only require compatible, reg, and
  spi-max-frequency
- Link to v1: https://lore.kernel.org/r/20260220-dev_ad5706r-v1-0-7253bbd74889@analog.com

---
Alexis Czezar Torreno (3):
      dt-bindings: iio: dac: Add binding for AD5706R
      iio: dac: ad5706r: Add support for AD5706R DAC
      MAINTAINERS: Add entry for AD5706R DAC driver

 .../devicetree/bindings/iio/dac/adi,ad5706r.yaml   |  48 +++++
 MAINTAINERS                                        |   8 +
 drivers/iio/dac/Kconfig                            |  10 +
 drivers/iio/dac/Makefile                           |   1 +
 drivers/iio/dac/ad5706r.c                          | 208 +++++++++++++++++++++
 5 files changed, 275 insertions(+)
---
base-commit: 3674f3ca92730d9a07b42b311f1337d83c4d5605
change-id: 20260220-dev_ad5706r-2105e1dd29ab

Best regards,
-- 
Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Re: [PATCH v2 0/3] Add support for AD5706R DAC
Posted by Uwe Kleine-König 3 weeks, 4 days ago
Hello,

On Wed, Mar 11, 2026 at 08:23:16AM +0800, Alexis Czezar Torreno wrote:
> This series adds support for the Analog Devices AD5706R, a 4-channel
> 16-bit current output digital-to-analog converter with SPI interface.
> 
> The AD5706R features:
>   - 4 independent current output DAC channels
>   - Configurable output ranges (50mA, 150mA, 200mA, 300mA)
>   - Hardware and software LDAC trigger with configurable edge selection
>   - Toggle and dither modes per channel
>   - Internal or external voltage reference selection
>   - PWM-controlled LDAC
>   - Dynamic change SPI speed
> 
> The driver exposes standard IIO raw/scale/offset channel attributes for
> DAC output control, sampling frequency for PWM-based LDAC timing, and
> extended attributes for device configuration including output range
> selection, trigger mode, and multiplexer output.
> 
> This driver is developed and tested on the Cora Z7S platform using
> the AXI SPI Engine and AXI CLKGEN IP cores. The 'clocks' property
> enables dynamic SPI clock rate management via the CLKGEN.
> 
> Datasheet: https://www.analog.com/en/products/ad5706r.html
> 
> Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>

This series was Cc:d to me an linux-pwm, however I don't spot any usage
of the pwm subsystem. If you still see some relevance for my feedback,
please highlight what I'm missing here.

Best regards
Uwe
Re: [PATCH v2 0/3] Add support for AD5706R DAC
Posted by Andy Shevchenko 3 weeks, 6 days ago
On Wed, Mar 11, 2026 at 08:23:16AM +0800, Alexis Czezar Torreno wrote:
> This series adds support for the Analog Devices AD5706R, a 4-channel
> 16-bit current output digital-to-analog converter with SPI interface.
> 
> The AD5706R features:
>   - 4 independent current output DAC channels
>   - Configurable output ranges (50mA, 150mA, 200mA, 300mA)
>   - Hardware and software LDAC trigger with configurable edge selection
>   - Toggle and dither modes per channel
>   - Internal or external voltage reference selection
>   - PWM-controlled LDAC
>   - Dynamic change SPI speed
> 
> The driver exposes standard IIO raw/scale/offset channel attributes for
> DAC output control, sampling frequency for PWM-based LDAC timing, and
> extended attributes for device configuration including output range
> selection, trigger mode, and multiplexer output.
> 
> This driver is developed and tested on the Cora Z7S platform using
> the AXI SPI Engine and AXI CLKGEN IP cores. The 'clocks' property
> enables dynamic SPI clock rate management via the CLKGEN.
> 
> Datasheet: https://www.analog.com/en/products/ad5706r.html

It's a v2 and still some very basic comments may be applied, such an
introduction of the record in MAINTAINERS database.

One more time, can't ADI introduce an internal Wiki page where standard
practices and/or typical issues be listed and be addressed BEFORE it's going to
the mailing lists?

-- 
With Best Regards,
Andy Shevchenko