arm64: dts: imx8mp-edm-g-wb: Use 0 for reserved bit

[RFC PATCH] arm64: dts: imx8mp-edm-g-wb: Use 0 for reserved bit

Posted by Eduard Bostina 4 weeks, 1 day ago

The i.MX8MP Reference Manual documents bit 0 of the
IOMUXC_SW_PAD_CTL_PAD registers as reserved. The hd3ss3220
IRQ pin (SAI1_RXD6/GPIO4_IO08) currently uses pad config
value 0x41 which sets this reserved bit.

Change 0x41 to 0x40 to leave the reserved bit cleared, as
recommended by the reference manual. This also allows for
easier conversion to symbolic macros.

Signed-off-by: Eduard Bostina <egbostina@gmail.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
index 242fa930b..a78401d11 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
@@ -345,7 +345,7 @@ MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17		0x16 /* DSI_VDDEN */
 
 	pinctrl_hd3ss3220_irq: hd3ss3220-irqgrp {
 		fsl,pins = <
-			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08		0x41 /* GPIO_P253 */
+			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08		0x40 /* GPIO_P253 */
 		>;
 	};
 
-- 
2.43.0

Re: [RFC PATCH] arm64: dts: imx8mp-edm-g-wb: Use 0 for reserved bit

Posted by Frank Li 2 weeks, 1 day ago

On Tue, Mar 10, 2026 at 09:10:53AM +0000, Eduard Bostina wrote:

Remove RFC.

> The i.MX8MP Reference Manual documents bit 0 of the
> IOMUXC_SW_PAD_CTL_PAD registers as reserved. The hd3ss3220
> IRQ pin (SAI1_RXD6/GPIO4_IO08) currently uses pad config
> value 0x41 which sets this reserved bit.
>
> Change 0x41 to 0x40 to leave the reserved bit cleared, as
> recommended by the reference manual.

Any impact if set bit 0 to 1?

> This also allows for
> easier conversion to symbolic macros.

Can you send this patch also?

Frank
>
> Signed-off-by: Eduard Bostina <egbostina@gmail.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
> index 242fa930b..a78401d11 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
> @@ -345,7 +345,7 @@ MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17		0x16 /* DSI_VDDEN */
>
>  	pinctrl_hd3ss3220_irq: hd3ss3220-irqgrp {
>  		fsl,pins = <
> -			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08		0x41 /* GPIO_P253 */
> +			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08		0x40 /* GPIO_P253 */
>  		>;
>  	};
>
> --
> 2.43.0
>

Re: [RFC PATCH] arm64: dts: imx8mp-edm-g-wb: Use 0 for reserved bit

Posted by Eddie 2 weeks ago

Hi Frank,

>> Change 0x41 to 0x40 to leave the reserved bit cleared, as
>> recommended by the reference manual.
>
> Any impact if set bit 0 to 1?
>


I have not tested this on hardware with the bit cleared, so
I cannot confirm functional impact for sure, but according to
section 8.2.4.238 of the iMX8MP reference manual, bit 0 of
SW_PAD_CTL_PAD_SAI1_RXD6 is reserved with a reset value of 0.
The only defined fields are PE (bit 8), HYS (bit 7),
PUE (bit 6), ODE (bit 5), FSEL (bit 4), and DSE (bits 2:1).

Both 0x41 and 0x40 should result in identical pad behavior.
Leaving it set probably risks undefined behavior in future
revisions of the silicon.


>> This also allows for
>> easier conversion to symbolic macros.
>
> Can you send this patch also?

Yes, I will send a followup patch soon.

Thanks for the review.

Eduard

În mar., 24 mar. 2026 la 17:48, Frank Li <Frank.li@nxp.com> a scris:
>
> On Tue, Mar 10, 2026 at 09:10:53AM +0000, Eduard Bostina wrote:
>
> Remove RFC.
>
> > The i.MX8MP Reference Manual documents bit 0 of the
> > IOMUXC_SW_PAD_CTL_PAD registers as reserved. The hd3ss3220
> > IRQ pin (SAI1_RXD6/GPIO4_IO08) currently uses pad config
> > value 0x41 which sets this reserved bit.
> >
> > Change 0x41 to 0x40 to leave the reserved bit cleared, as
> > recommended by the reference manual.
>
> Any impact if set bit 0 to 1?
>
> > This also allows for
> > easier conversion to symbolic macros.
>
> Can you send this patch also?
>
> Frank
> >
> > Signed-off-by: Eduard Bostina <egbostina@gmail.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
> > index 242fa930b..a78401d11 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts
> > @@ -345,7 +345,7 @@ MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17                0x16 /* DSI_VDDEN */
> >
> >       pinctrl_hd3ss3220_irq: hd3ss3220-irqgrp {
> >               fsl,pins = <
> > -                     MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08              0x41 /* GPIO_P253 */
> > +                     MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08              0x40 /* GPIO_P253 */
> >               >;
> >       };
> >
> > --
> > 2.43.0
> >