[v2] Validate and clean up UHS/DDR/HS200 timing checks

[PATCH v2 0/2] Validate and clean up UHS/DDR/HS200 timing checks

Posted by Shawn Lin 1 month ago

From: Shawn Lin <shawn.lin@rock-chips.com>


This series adds validation for UHS/DDR/HS200 timing modes when the host
only supports 1-bit bus width which also fixes a real performance drop issue
due to incorrect hs200 mode switch code. And then cleans up the check in
mmc_host_can_uhs().


Changes in v2:
- updating the temporary variables in the middle and update host's caps(2)
  in the final. (Ulf)

Luke Wang (1):
  mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width

Shawn Lin (1):
  mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()

 drivers/mmc/core/host.c | 14 +++++++++++++-
 drivers/mmc/core/host.h |  6 +-----
 2 files changed, 14 insertions(+), 6 deletions(-)

-- 
2.7.4

Re: [PATCH v2 0/2] Validate and clean up UHS/DDR/HS200 timing checks

Posted by Ulf Hansson 3 weeks, 2 days ago

On Tue, 10 Mar 2026 at 02:36, Shawn Lin <shawn.lin@linux.dev> wrote:
>
> From: Shawn Lin <shawn.lin@rock-chips.com>
>
>
> This series adds validation for UHS/DDR/HS200 timing modes when the host
> only supports 1-bit bus width which also fixes a real performance drop issue
> due to incorrect hs200 mode switch code. And then cleans up the check in
> mmc_host_can_uhs().
>
>
> Changes in v2:
> - updating the temporary variables in the middle and update host's caps(2)
>   in the final. (Ulf)
>
> Luke Wang (1):
>   mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width
>
> Shawn Lin (1):
>   mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()
>
>  drivers/mmc/core/host.c | 14 +++++++++++++-
>  drivers/mmc/core/host.h |  6 +-----
>  2 files changed, 14 insertions(+), 6 deletions(-)
>
> --
> 2.7.4
>

The series applied for next, thanks!

Kind regards
Uffe