[PATCH v5 0/7] arm64: Add initial support for NXP S32N79 SoC

Ciprian Costea posted 7 patches 1 month ago
There is a newer version of this series
.../devicetree/bindings/arm/fsl.yaml          |   6 +
.../interrupt-controller/fsl,irqsteer.yaml    |   4 +-
.../bindings/mmc/fsl-imx-esdhc.yaml           |   1 +
arch/arm64/boot/dts/freescale/Makefile        |   1 +
arch/arm64/boot/dts/freescale/s32n79-rdb.dts  |  70 ++++
arch/arm64/boot/dts/freescale/s32n79.dtsi     | 362 ++++++++++++++++++
drivers/irqchip/Kconfig                       |   6 +-
drivers/irqchip/irq-imx-irqsteer.c            |  55 ++-
drivers/mmc/host/sdhci-esdhc-imx.c            |   9 +
9 files changed, 497 insertions(+), 17 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/s32n79-rdb.dts
create mode 100644 arch/arm64/boot/dts/freescale/s32n79.dtsi
[PATCH v5 0/7] arm64: Add initial support for NXP S32N79 SoC
Posted by Ciprian Costea 1 month ago
From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

This series introduces initial device tree support for the NXP S32N79
automotive SoC and its Reference Design Board (RDB).

The S32N79 is an automotive-grade system-on-chip featuring eight Arm
Cortex-A78AE cores organized in four dual-core clusters. It is designed
for high-performance networking and gateway applications vehicle
architectures [1]

Hardware features included in this initial support:
- 8x Arm Cortex-A78AE cores (4 clusters of 2 cores each)
- 32GB DRAM Memory. 28GB are usable and 4GB are reserved for ECC logic
- Three-level cache hierarchy (L1/L2 per core, L3 per cluster)
- GICv3 interrupt controller with ITS
- SMMUv3 for IOMMU support
- Generic Timer
- IRQ steering controller
- PL011 UART controllers
- uSDHC controller

This series also includes the necessary driver updates:
- sdhci-esdhc-imx: Add S32N79 uSDHC controller support
- irq-imx-irqsteer: Add S32N79 IRQ steering support
- irqchip Kconfig: Add ARCH_S32 dependency for IMX_IRQSTEER

Future patches will add support for additional peripherals such as
networking controllers, PCIe, and other IP blocks.

[1] https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32n-vehicle-super-integration-processors:S32N

v5 -> v4
- Squashed irqsteer 'Kconfig' changes with the actual driver updates.
- Fixed tabular layout in the irq-imx-irqsteer driver
- Added received 'Reviewed-by' and 'Acked-by' tags from V4.

v4 -> v3
- Added missing Signed-of-by's from one commit removed in v3 by mistake

v3 -> v2
- Split S32N79 SoC dtsi into separate standalone commit
- Renamed a memory node in the S32N79 board dts
- Fixed IRQ STEER DT-Bindings support for S32N79 addition
- Updated S32N79 usdhc driver support commit message

v2 -> v1
- added driver changes required for S32N79 uSDHC support
- added driver changes required for S32N79 IRQ_STEER support
- updated commit message for uSDHC dt-bindings
- implemented fixes for 'dt-format' tool findings on newly added S32N79 dts files

Ciprian Marian Costea (7):
  dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support
  dt-bindings: mmc: fsl-imx-esdhc: add S32N79 support
  dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board
  mmc: sdhci-esdhc-imx: add NXP S32N79 support
  irqchip/imx-irqsteer: add NXP S32N79 support
  arm64: dts: freescale: Add NXP S32N79 SoC support
  arm64: dts: freescale: Add NXP S32N79-RDB board support

 .../devicetree/bindings/arm/fsl.yaml          |   6 +
 .../interrupt-controller/fsl,irqsteer.yaml    |   4 +-
 .../bindings/mmc/fsl-imx-esdhc.yaml           |   1 +
 arch/arm64/boot/dts/freescale/Makefile        |   1 +
 arch/arm64/boot/dts/freescale/s32n79-rdb.dts  |  70 ++++
 arch/arm64/boot/dts/freescale/s32n79.dtsi     | 362 ++++++++++++++++++
 drivers/irqchip/Kconfig                       |   6 +-
 drivers/irqchip/irq-imx-irqsteer.c            |  55 ++-
 drivers/mmc/host/sdhci-esdhc-imx.c            |   9 +
 9 files changed, 497 insertions(+), 17 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/s32n79-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/s32n79.dtsi

-- 
2.43.0
Re: [PATCH v5 0/7] arm64: Add initial support for NXP S32N79 SoC
Posted by Ulf Hansson 1 month ago
On Mon, 9 Mar 2026 at 15:34, Ciprian Costea
<ciprianmarian.costea@oss.nxp.com> wrote:
>
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> This series introduces initial device tree support for the NXP S32N79
> automotive SoC and its Reference Design Board (RDB).
>
> The S32N79 is an automotive-grade system-on-chip featuring eight Arm
> Cortex-A78AE cores organized in four dual-core clusters. It is designed
> for high-performance networking and gateway applications vehicle
> architectures [1]
>
> Hardware features included in this initial support:
> - 8x Arm Cortex-A78AE cores (4 clusters of 2 cores each)
> - 32GB DRAM Memory. 28GB are usable and 4GB are reserved for ECC logic
> - Three-level cache hierarchy (L1/L2 per core, L3 per cluster)
> - GICv3 interrupt controller with ITS
> - SMMUv3 for IOMMU support
> - Generic Timer
> - IRQ steering controller
> - PL011 UART controllers
> - uSDHC controller
>
> This series also includes the necessary driver updates:
> - sdhci-esdhc-imx: Add S32N79 uSDHC controller support
> - irq-imx-irqsteer: Add S32N79 IRQ steering support
> - irqchip Kconfig: Add ARCH_S32 dependency for IMX_IRQSTEER
>
> Future patches will add support for additional peripherals such as
> networking controllers, PCIe, and other IP blocks.
>
> [1] https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32n-vehicle-super-integration-processors:S32N
>
> v5 -> v4
> - Squashed irqsteer 'Kconfig' changes with the actual driver updates.
> - Fixed tabular layout in the irq-imx-irqsteer driver
> - Added received 'Reviewed-by' and 'Acked-by' tags from V4.
>
> v4 -> v3
> - Added missing Signed-of-by's from one commit removed in v3 by mistake
>
> v3 -> v2
> - Split S32N79 SoC dtsi into separate standalone commit
> - Renamed a memory node in the S32N79 board dts
> - Fixed IRQ STEER DT-Bindings support for S32N79 addition
> - Updated S32N79 usdhc driver support commit message
>
> v2 -> v1
> - added driver changes required for S32N79 uSDHC support
> - added driver changes required for S32N79 IRQ_STEER support
> - updated commit message for uSDHC dt-bindings
> - implemented fixes for 'dt-format' tool findings on newly added S32N79 dts files
>
> Ciprian Marian Costea (7):
>   dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support
>   dt-bindings: mmc: fsl-imx-esdhc: add S32N79 support
>   dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board
>   mmc: sdhci-esdhc-imx: add NXP S32N79 support
>   irqchip/imx-irqsteer: add NXP S32N79 support
>   arm64: dts: freescale: Add NXP S32N79 SoC support
>   arm64: dts: freescale: Add NXP S32N79-RDB board support
>
>  .../devicetree/bindings/arm/fsl.yaml          |   6 +
>  .../interrupt-controller/fsl,irqsteer.yaml    |   4 +-
>  .../bindings/mmc/fsl-imx-esdhc.yaml           |   1 +
>  arch/arm64/boot/dts/freescale/Makefile        |   1 +
>  arch/arm64/boot/dts/freescale/s32n79-rdb.dts  |  70 ++++
>  arch/arm64/boot/dts/freescale/s32n79.dtsi     | 362 ++++++++++++++++++
>  drivers/irqchip/Kconfig                       |   6 +-
>  drivers/irqchip/irq-imx-irqsteer.c            |  55 ++-
>  drivers/mmc/host/sdhci-esdhc-imx.c            |   9 +
>  9 files changed, 497 insertions(+), 17 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/freescale/s32n79-rdb.dts
>  create mode 100644 arch/arm64/boot/dts/freescale/s32n79.dtsi
>
> --
> 2.43.0
>

Patch2 and patch4 applied for next, thanks!

Kind regards
Uffe