Add the ICE found on sm8250 and link it to the UFS node.
qcom-ice 1d90000.crypto: Found QC Inline Crypto Engine (ICE) v3.1.81
Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index c7dffa440074..b49007934278 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2513,6 +2513,8 @@ ufs_mem_hc: ufshc@1d84000 {
power-domains = <&gcc UFS_PHY_GDSC>;
+ qcom,ice = <&ice>;
+
iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>;
clock-names =
@@ -2592,6 +2594,17 @@ ufs_mem_phy: phy@1d87000 {
status = "disabled";
};
+ ice: crypto@1d90000 {
+ compatible = "qcom,sm8250-inline-crypto-engine",
+ "qcom,inline-crypto-engine";
+ reg = <0 0x01d90000 0 0x8000>;
+ clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
+ <&gcc GCC_UFS_PHY_AHB_CLK>;
+ clock-names = "ice_core_clk",
+ "iface_clk";
+ power-domains = <&gcc UFS_PHY_GDSC>;
+ };
+
cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0 0x01dc4000 0 0x24000>;
--
2.53.0