[v1] Validate and clean up UHS/DDR/HS200 timing checks

[PATCH 0/2] Validate and clean up UHS/DDR/HS200 timing checks

Shawn Lin posted 2 patches 1 month ago

Diff against v2
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There is a newer version of this series

drivers/mmc/core/host.c | 9 +++++++++
drivers/mmc/core/host.h | 6 +-----
2 files changed, 10 insertions(+), 5 deletions(-)

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[PATCH 0/2] Validate and clean up UHS/DDR/HS200 timing checks

Posted by Shawn Lin 1 month ago

This series adds validation for UHS/DDR/HS200 timing modes when the host
only supports 1-bit bus width which also fixes a real performance drop issue
due to incorrect hs200 mode switch code. And then cleans up the check in
mmc_host_can_uhs().


Luke Wang (1):
  mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width

Shawn Lin (1):
  mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()

 drivers/mmc/core/host.c | 9 +++++++++
 drivers/mmc/core/host.h | 6 +-----
 2 files changed, 10 insertions(+), 5 deletions(-)

-- 
2.7.4

[PATCH 1/2] mmc: core: Validate UHS/DDR/HS200 timing selection for 1-bit bus width
[PATCH 2/2] mmc: core: Remove checking MMC_CAP_4_BIT_DATA from mmc_host_can_uhs()