Add documentation for the sysfs files
/sys/devices/system/cpu/cpufreq/policy*/amd_pstate_floor_freq
and
/sys/devices/system/cpu/cpufreq/policy*/amd_pstate_floor_count.

Signed-off-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
---
 Documentation/admin-guide/pm/amd-pstate.rst | 32 +++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst
index f566fea6613e6..5fd2a36f8a4b8 100644
--- a/Documentation/admin-guide/pm/amd-pstate.rst
+++ b/Documentation/admin-guide/pm/amd-pstate.rst
@@ -242,6 +242,8 @@ control its functionality at the system level. They are located in the
  /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_hw_prefcore
  /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_lowest_nonlinear_freq
  /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_max_freq
+ /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_floor_freq
+ /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_floor_count
  /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_prefcore_ranking
 
 
@@ -278,6 +280,36 @@ can change at runtime based on platform conditions. This attribute is
 read-only.  This file is only visible on platforms which support the
 preferred core feature.
 
+``amd_pstate_floor_freq``
+
+The floor frequency associated with each CPU. Userspace can write any
+value between ``cpuinfo_min_freq`` and ``scaling_max_freq`` into this
+file. When the system is under power or thermal constraints, the
+platform firmware will attempt to throttle the CPU frequency to the
+value specified in ``amd_pstate_floor_freq`` before throttling it
+further. This allows userspace to specify different floor frequencies
+to different CPUs. For optimal results, threads of the same core
+should have the same floor frequency value. This file is only visible
+on platforms that support the CPPC Performance Priority feature.
+
+
+``amd_pstate_floor_count``
+
+The number of distinct Floor Performance levels supported by the
+platform. For example, if this value is 2, then the number of unique
+values obtained from the command ``cat
+/sys/devices/system/cpu/cpufreq/policy*/amd_pstate_floor_freq |
+sort -n | uniq`` should be at most this number for the behavior
+described in ``amd_pstate_floor_freq`` to take effect. A zero value
+implies that the platform supports unlimited floor performance levels.
+This file is only visible on platforms that support the CPPC
+Performance Priority feature.
+
+**Note**: When ``amd_pstate_floor_count`` is non-zero, the frequency to
+which the CPU is throttled under power or thermal constraints is
+undefined when the number of unique values of ``amd_pstate_floor_freq``
+across all CPUs in the system exceeds ``amd_pstate_floor_count``.
+
 ``energy_performance_available_preferences``
 
 A list of all the supported EPP preferences that could be used for
-- 
2.34.1

Hello Gautham,

On 3/6/2026 3:27 PM, Gautham R. Shenoy wrote:
> +``amd_pstate_floor_freq``
> +
> +The floor frequency associated with each CPU. Userspace can write any
> +value between ``cpuinfo_min_freq`` and ``scaling_max_freq`` into this
> +file. When the system is under power or thermal constraints, the
> +platform firmware will attempt to throttle the CPU frequency to the
> +value specified in ``amd_pstate_floor_freq`` before throttling it
> +further. This allows userspace to specify different floor frequencies
> +to different CPUs. For optimal results, threads of the same core
> +should have the same floor frequency value. This file is only visible
> +on platforms that support the CPPC Performance Priority feature.

nit. Should we note that the driver caches the closes perf value and the
read of the file will output the corresponding frequency of the perf
level?

Otherwise, it might come as a surprise to the user that the read of file
returns a value very close to what was written but not exactly equal to
it all the times.

Or should we just cache the raw frequency value when user modifies it
and keep the perf translation bits opaque to the user?

-- 
Thanks and Regards,
Prateek

Hello Prateek,

On Tue, Mar 10, 2026 at 09:15:03AM +0530, K Prateek Nayak wrote:
> Hello Gautham,
> 
> On 3/6/2026 3:27 PM, Gautham R. Shenoy wrote:
> > +``amd_pstate_floor_freq``
> > +
> > +The floor frequency associated with each CPU. Userspace can write any
> > +value between ``cpuinfo_min_freq`` and ``scaling_max_freq`` into this
> > +file. When the system is under power or thermal constraints, the
> > +platform firmware will attempt to throttle the CPU frequency to the
> > +value specified in ``amd_pstate_floor_freq`` before throttling it
> > +further. This allows userspace to specify different floor frequencies
> > +to different CPUs. For optimal results, threads of the same core
> > +should have the same floor frequency value. This file is only visible
> > +on platforms that support the CPPC Performance Priority feature.
> 
> nit. Should we note that the driver caches the closes perf value and the
> read of the file will output the corresponding frequency of the perf
> level?
> 
> Otherwise, it might come as a surprise to the user that the read of file
> returns a value very close to what was written but not exactly equal to
> it all the times.
> 
> Or should we just cache the raw frequency value when user modifies it
> and keep the perf translation bits opaque to the user?

I think it is better to cache the user requested value of
amd_pstate_floor_freq in cpudata and report the same when the user
reads the sysfs file.

I will change this in v2. Thanks for the feedback.

> 
> -- 
> Thanks and Regards,
> Prateek
> 

-- 
Thanks and Regards
gautham.