Starting with sc7280(kodiak), the ICE will have its own device-tree node.
So add the qcom,ice property to reference it.
To avoid double-modeling, when qcom,ice is present, disallow an embedded ICE
register region in the SDHCI node. Older SoCs without ICE remain valid as
no additional requirement is imposed.
Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
---
Some initial work is done by Abel here:
https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/
and by Abhinaba here:
https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@oss.qualcomm.com/
This patch adds the purpose and usage for phandle in the description and encodes
it properly in the schema.
---
.../devicetree/bindings/mmc/sdhci-msm.yaml | 95 +++++++++++++------
1 file changed, 67 insertions(+), 28 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 938be8228d66..cc9f7724bdf0 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -140,6 +140,11 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
description: platform specific settings for DLL_CONFIG reg.
+ qcom,ice:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ phandle to the Inline Crypto Engine (ICE) hardware block for this controller.
+
iommus:
minItems: 1
maxItems: 8
@@ -193,35 +198,69 @@ allOf:
enum:
- qcom,sdhci-msm-v4
then:
- properties:
- reg:
- minItems: 2
- items:
- - description: Host controller register map
- - description: SD Core register map
- - description: CQE register map
- - description: Inline Crypto Engine register map
- reg-names:
- minItems: 2
- items:
- - const: hc
- - const: core
- - const: cqhci
- - const: ice
+ if:
+ required:
+ - qcom,ice
+ then:
+ properties:
+ reg:
+ minItems: 2
+ items:
+ - description: Host controller register map
+ - description: SD Core register map
+ - description: CQE register map
+ reg-names:
+ minItems: 2
+ items:
+ - const: hc
+ - const: core
+ - const: cqhci
+ else:
+ properties:
+ reg:
+ minItems: 2
+ items:
+ - description: Host controller register map
+ - description: SD Core register map
+ - description: CQE register map
+ - description: Inline Crypto Engine register map
+ reg-names:
+ minItems: 2
+ items:
+ - const: hc
+ - const: core
+ - const: cqhci
+ - const: ice
else:
- properties:
- reg:
- minItems: 1
- items:
- - description: Host controller register map
- - description: CQE register map
- - description: Inline Crypto Engine register map
- reg-names:
- minItems: 1
- items:
- - const: hc
- - const: cqhci
- - const: ice
+ if:
+ required:
+ - qcom,ice
+ then:
+ properties:
+ reg:
+ minItems: 1
+ items:
+ - description: Host controller register map
+ - description: CQE register map
+ reg-names:
+ minItems: 1
+ items:
+ - const: hc
+ - const: cqhci
+ else:
+ properties:
+ reg:
+ minItems: 1
+ items:
+ - description: Host controller register map
+ - description: CQE register map
+ - description: Inline Crypto Engine register map
+ reg-names:
+ minItems: 1
+ items:
+ - const: hc
+ - const: cqhci
+ - const: ice
unevaluatedProperties: false
--
2.34.1On Fri, Mar 06, 2026 at 03:03:30PM +0530, Neeraj Soni wrote: > Starting with sc7280(kodiak), the ICE will have its own device-tree node. > So add the qcom,ice property to reference it. > > To avoid double-modeling, when qcom,ice is present, disallow an embedded ICE Can you finally fix checkpatch warning? I have impression you ignore checkpatch in each posting. Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit): https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > register region in the SDHCI node. Older SoCs without ICE remain valid as > no additional requirement is imposed. With this fixed Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Best regards, Krzysztof
On 3/7/2026 4:06 PM, Krzysztof Kozlowski wrote: > On Fri, Mar 06, 2026 at 03:03:30PM +0530, Neeraj Soni wrote: >> Starting with sc7280(kodiak), the ICE will have its own device-tree node. >> So add the qcom,ice property to reference it. >> >> To avoid double-modeling, when qcom,ice is present, disallow an embedded ICE > > Can you finally fix checkpatch warning? I have impression you ignore > checkpatch in each posting. > > Please wrap commit message according to Linux coding style / submission > process (neither too early nor over the limit): > https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > Sure I will fix this in next patch. >> register region in the SDHCI node. Older SoCs without ICE remain valid as >> no additional requirement is imposed. > > With this fixed > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> > > Best regards, > Krzysztof > Regards Neeraj
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