From: Xuyang Dong <dongxuyang@eswincomputing.com>

There is already a patch [1] for the DesignWare PWM driver, 
which is posted by Ben and still under review. 
Based on this patch, this series is a continuation of [1] 
to add support for IP versions 2.11a and later, which 
includes support for "Pulse Width Modulation with 0% 
and 100% Duty Cycle".

Supported chips:
ESWIN EIC7700 series SoC.

Test:
Tested this patch on the Sifive HiFive Premier P550 (which uses the EIC7700
SoC).

[1] https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/

Updates:
  Change in v2:
  - YAML:
    - Remove eswin,eic7700-pwm.yaml. Use snps,dw-apb-timers-pwm2.yaml.
      The description in snps,dw-apb-timers-pwm2.yaml is better.
    - Add the resets property as optional, as defined in the databook.
    - Remove snps,pwm-full-range-enable as no additional property is needed.
  - Driver:
    - Change the file from pwm-dwc-eic7700.c to pwm-dwc-of.c from [1].
    - Define DWC_TIM_VERSION_ID_2_11A 2.11a as the baseline version.
    - Enable the 0% and 100% duty cycle mode by setting dwc->feature if
      the version read from the TIMERS_COMP_VERSION register is later
      than or equal to DWC_TIM_VERSION_ID_2_11A.
    - Use the DIV_ROUND_UP_ULL() to calculate width in the .apply and
      .get_state.
    - Additionally, Power Management (PM) support has been added to the
      pwm-dwc-of.c driver.
    - Drop the headers that are not used.
    - Use devm_clk_get_enabled() instead of devm_clk_get().
    - Drop of_match_ptr.
    - Fix build error with 1ULL << 32.
      Reported-by: kernel test robot <lkp@intel.com>
      Closes: https://lore.kernel.org/oe-kbuild-all/202512061720.j31AsgM7-lkp@intel.com/

  - Link to v1: https://lore.kernel.org/all/20251205090411.1388-1-dongxuyang@eswincomputing.com/
  - Link to v9: https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/

Xuyang Dong (2):
  dt-bindings: pwm: dwc: add reset optional
  pwm: dwc: add of/platform support

 .../bindings/pwm/snps,dw-apb-timers-pwm2.yaml |   3 +
 drivers/pwm/Kconfig                           |  10 +
 drivers/pwm/Makefile                          |   1 +
 drivers/pwm/pwm-dwc-core.c                    | 101 ++++++--
 drivers/pwm/pwm-dwc-of.c                      | 216 ++++++++++++++++++
 drivers/pwm/pwm-dwc.h                         |  25 +-
 6 files changed, 327 insertions(+), 29 deletions(-)
 create mode 100644 drivers/pwm/pwm-dwc-of.c

--
2.34.1

On Fri, Mar 06, 2026 at 05:30:00PM +0800, dongxuyang@eswincomputing.com wrote:
> From: Xuyang Dong <dongxuyang@eswincomputing.com>
> 
> There is already a patch [1] for the DesignWare PWM driver, 

So provide review there instead of allowing Ben to post incomplete
hardware description which you want to correct here...

I don't understand why posting this change.



> which is posted by Ben and still under review. 
> Based on this patch, this series is a continuation of [1] 
> to add support for IP versions 2.11a and later, which 
> includes support for "Pulse Width Modulation with 0% 
> and 100% Duty Cycle".

Best regards,
Krzysztof

On 07/03/2026 13:24, Krzysztof Kozlowski wrote:
> On Fri, Mar 06, 2026 at 05:30:00PM +0800, dongxuyang@eswincomputing.com wrote:
>> From: Xuyang Dong <dongxuyang@eswincomputing.com>
>>
>> There is already a patch [1] for the DesignWare PWM driver,
> 
> So provide review there instead of allowing Ben to post incomplete
> hardware description which you want to correct here...
> 
> I don't understand why posting this change.

I think the binding got merged a while ago whilst we ended up never
getting the go-ahead to finish the driver changes. Unfortunately
all the client hardware was returned and we had to destroy all the
data from them.

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html

On 07/03/2026 14:24, Krzysztof Kozlowski wrote:
> On Fri, Mar 06, 2026 at 05:30:00PM +0800, dongxuyang@eswincomputing.com wrote:
>> From: Xuyang Dong <dongxuyang@eswincomputing.com>
>>
>> There is already a patch [1] for the DesignWare PWM driver, 
> 
> So provide review there instead of allowing Ben to post incomplete
> hardware description which you want to correct here...
> 
> I don't understand why posting this change.

I see now Ben did not post the bindings change, so this message here
just confused me.

> 
> 
> 
>> which is posted by Ben and still under review. 
>> Based on this patch, this series is a continuation of [1] 
>> to add support for IP versions 2.11a and later, which 
>> includes support for "Pulse Width Modulation with 0% 
>> and 100% Duty Cycle".

But does this mean the patchset cannot be even tested?

> 
> Best regards,
> Krzysztof
> 


Best regards,
Krzysztof

Hi Krzysztof,

> >>
> >> There is already a patch [1] for the DesignWare PWM driver, 
> > 
> > So provide review there instead of allowing Ben to post incomplete
> > hardware description which you want to correct here...
> > 
> > I don't understand why posting this change.
> 
> I see now Ben did not post the bindings change, so this message here
> just confused me.

We noticed Ben’s DesignWare PWM driver series on lore [1]. The patches for 
the DT bindings, pwm-dwc.c and pwm-dwc-core.c have already been merged into 
the kernel, for example, patches 1/6, 2/6, and 3/6. 
However, the pwm-dwc-of.c patch has not yet been accepted, for example, 
patches 4/6, 5/6, and 6/6.
We discussed the status of this PWM series with Ben on lore. Given the lack 
of recent updates following Ben’s message in [2], we’d like to step in and 
help move this forward.

This series is based on v9 and includes the following updates:
1. Migrated to the latest PWM subsystem structure and APIs.
2. Added support for 0% and 100% duty cycle modes.
3. Implemented basic power management (runtime PM) support.

The previous series (v1) has been deprecated. Would it be more 
appropriate to send this as v2 rather than v10?

[1] https://lore.kernel.org/lkml/20230907161242.67190-1-ben.dooks@codethink.co.uk/
[2] https://lore.kernel.org/lkml/0bdd6ab6-bfdd-400e-99b6-cfb186dfcc3e@codethink.co.uk/

The binding file 'snps,dw-apb-timers-pwm2.yaml' has already been merged, 
but the current driver lacks reset support.  
Therefore, patch 1 adds an optional reset property to address this.

We will update the commit message in the next version.

> > 
> > 
> > 
> >> which is posted by Ben and still under review. 
> >> Based on this patch, this series is a continuation of [1] 
> >> to add support for IP versions 2.11a and later, which 
> >> includes support for "Pulse Width Modulation with 0% 
> >> and 100% Duty Cycle".
> 
> But does this mean the patchset cannot be even tested?

Support for 0% and 100% duty cycle mode (available in DesignWare PWM IP
version 2.11a and later) has been tested on the EIC7700 SoC, which
integrates IP version 2.13a.

For Ben's implementation, which does not support this mode, testing can
still be done by setting dwc->features to 0 after reading the version
register, effectively disabling 0% and 100% duty cycle support.

Regards,
Xuyang Dong